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參數(shù)資料
| 型號： | AD629BRZ-RL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | High Common-Mode Voltage, Difference Amplifier |
| 中文描述： | OP-AMP, 1000 uV OFFSET-MAX, PDSO8 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MS-012AA, SOIC-8 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大?。?/td> | 415K |
| 代理商： | AD629BRZ-RL |
AD629
Rev. B | Page 8 of 16
0
V
OUT
0V
5V/DIV
1mV/DIV
OUTPUT
ERROR
+10V
10μs/DIV
1mV = 0.01%
Figure 23. Settling Time to 0.01%, for 0 V to 10 V Output Step; G = 1, R
L
= 2 kΩ
COMMON-MODE REJECTION RATIO (ppm)
N
350
300
250
200
150
100
50
0
–50
–100
50
0
1
100
0
50
N = 2180
n
≈
200 PCS. FROM
10 ASSEMBLY LOTS
Figure 24. Typical Distribution of Common-Mode Rejection; Package Option N-8
–1 GAIN ERROR (ppm)
N
400
300
250
350
200
150
100
50
0
–200
–400
200
0
6
400
0
00
N = 2180
n
≈
200 PCS. FROM
10 ASSEMBLY LOTS
Figure 25. Typical Distribution of 1 Gain Error; Package Option N-8
0
V
OUT
–10V
5V/DIV
1mV/DIV
OUTPUT
ERROR
0V
10μs/DIV
1mV = 0.01%
Figure 26. Settling Time to 0.01% for 0 V to 10 V Output Step; G = 1, R
L
= 2kΩ
OFFSET VOLTAGE (μV)
N
300
250
200
150
100
50
0
–900
–300
–600
300
0
9
600
0
00
N = 2180
n
≈
200 PCS. FROM
10 ASSEMBLY LOTS
Figure 27. Typical Distribution of Offset Voltage; Package Option N-8
+1 GAIN ERROR (ppm)
N
400
300
250
350
200
150
100
50
0
–200
–400
200
0
600
400
0
N = 2180
n
≈
200 PCS. FROM
10 ASSEMBLY LOTS
Figure 28. Typical Distribution of +1 Gain Error; Package Option N-8
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