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參數(shù)資料
| 型號： | AD6122ACP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | CAP 39000UF 35V ELECT THA SERIES |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQCC32 |
| 封裝： | MO-220-VHHD-2, LPCC-32 |
| 文件頁數(shù)： | 17/20頁 |
| 文件大小： | 264K |
| 代理商： | AD6122ACP |
REV. B
AD6122
–
17
–
Table III describes the high frequency signal connectors on the
AD6122 customer sample boards.
Table III. Evaluation Board SMA Signal Connector
Description
Connector
Description
I Modulator Input. 250 mV p-p into 50
termination, dc coupled. The level shifting and
phase splitting is done on board by the AD830
amplifiers.
Q Modulator Input. 250 mV p-p into 50
termination, ac coupled. The level shifting and
phase splitting is done on board by the AD830
amplifiers.
I CH
Q CH
MODOP
Modulator Output. The differential-to-single
ended conversion is performed by a balun on
the board. Impedance matched to 50
for
130.38 MHz IF frequency.
IFIP
IF Amplifier Input. Single-ended-to-differential
conversion performed by a balun on board.
Impedance matched to 50
for 130.38 MHz IF
frequency.
TXOP
IF Amplifier Output. Differential-to-single-
ended conversion performed by a balun on
board. Impedance matched to 50
for 130.38
MHz IF frequency.
Local oscillator positive input at 2
×
IF
frequency.
LOIPP
Table IV lists the connections for the 20-pin power-supply
connector.
Table IV. 20-Pin Power Supply Connection Information
Pin #
Function
1
VPOS for AD6122; 2.9 V to 4.2 V using regulator; 2.7 V
to 4.2 V bypassing regulator.
VPOS for AD6122; 2.9 V to 4.2 V using regulator; 2.7 V
to 3.6 V bypassing regulator.
Ground.
Ground.
Ground.
Regulated Output or Input Voltage; Connects to Pin 5
on AD6122.
Ground.
Ground.
Ground.
Ground.
Ground.
PD1; Power-Down 1 Input.
Ground.
1.23 V Reference Voltage from AD6122.
Ground.
VGAIN; Gain Control Voltage Input.
–
15 V Supply for AD830 Differential Amplifier.
+15 V Supply for AD830 Differential Amplifier.
MODCMREF; common-mode reference output for
baseband converter common-mode reference input.
PD2; Power-Down 2 Input.
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
A schematic diagram of the evaluation board is on the next two
pages.
相關PDF資料 |
PDF描述 |
|---|---|
| AD6122ACPRL | CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator |
| AD6122 | CDMA 3 V Receiver IF Subsystem with Integrated Voltage Regulator(低功耗接收中頻子系統(tǒng)) |
| AD6140ARSRL | Bandpass IF Subsystem |
| AD6140ARS | RE Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 3.3V; Output Voltage (Vdc): 12V; Power: 1W; Industry Standard Pinout; 1kVDC & 2kVDC Isolation; UL94V-0 Package Material; Optional Continuous Short Circuit Protected; Fully Encapsulated; Custom Solutions Available; Efficiency to 85% |
| AD6140 | Bandpass ∑△ IF Subsystem(帶通∑△IF子系統(tǒng)) |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD6122ACPRL | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator |
| AD6122ARS | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator |
| AD6122ARSRL | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator |
| AD612BS | 制造商:POP 功能描述: |
| AD6140 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Bandpass IF Subsystem |
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