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參數(shù)資料
| 型號： | AD608 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low Power Mixer/Limiter/RSSI 3 V Receiver IF Subsystem(低功耗混合器/Limiter/RSSI 3V接收器IF子系統(tǒng)) |
| 中文描述： | 低功耗混合機(jī)/限制器/ RSSI的3 V接收機(jī)中頻子系統(tǒng)（低功耗混合器/限幅/ RSSI的3V的接收器中頻子系統(tǒng)） |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 201K |
| 代理商： | AD608 |
AD608
REV. B
–7–
T HE ORY OF OPE RAT ION
T he AD608 (Figure 20) consists of a mixer followed by a loga-
rithmic IF strip with RSSI and hard limited outputs. Each sec-
tion will be described below.
Mixer
T he mixer is a doubly-balanced modified Gilbert cell mixer. Its
maximum input level for linear operation is
±
56.2 mV regard-
less of the impedance across the mixer’s inputs, or –15 dBm for
a 50
input termination. T he input impedance of the mixer
can be modeled as a simple parallel RC network; the values ver-
sus frequency are listed in T able I. T he bandwidth from the RF
input to the IF output at MX OP pin is –1 dB at 30 MHz and
then falls off rapidly (Figure 4).
Mixer Gain
T he mixer’s conversion gain is the product of its transcon-
ductance and the impedance seen at pin MX OP. For a 330
parallel-terminated filter at 10.7 MHz, the load impedance is
165
, the gain is 24 dB, and the output is 15.85
×
56.2 mV, or
±
891 mV, centered on the midpoint of the supply voltage. For
other load impedances, the expression for the gain in dB is
G
dB
=
20 log
10
0
.
0961 R
L
(
)
T he mixer’s gain can be increased or decreased by changing R
L
,
the load impedance at pin MX OP. T he limitations on the
mixer’s gain are the
±
6 mA maximum output current at MX OP
and the maximum allowable voltage swing at pin MX OP, which
is
±
1.0 V for a 3 V supply or 5 V supply.
T able I. Mixer Input Impedance vs. Frequency
Frequency
(MHz)
Resistance
(Ohms)
Capacitance
(pF)
45
70
100
200
300
400
500
2800
2600
1800
1200
760
520
330
3.1
3.1
3.1
3.1
3.2
3.4
3.6
24dB MIXER GAIN
110dB LIMITER GAIN
90dB RSSI
BIAS
MXOP
MIXER
BPF
DRIVER
VMID
LO
PREAMP
AD608
RFHI
RFLO
IF INPUT
–75dBm TO
+15dBm
2.
IFHI
IFLO
LMOP
VPS2
RSSI
FDBK
COM3
FINAL
LIMITER
100nF
10nF
330
±
50
μ
A
10.7MHz
BANDPASS
FILTER
330
MID-SUPPLY
IF BIAS
6
5
7
8
10
9
13
14
12
15
11
1
2
3
4
16
LIMITER
OUTPUT
400mVp-p
PRUP
RF INPUT
–95 TO
–15dBm
1.
VPS1 COM1
COM2
LOIP
RSSI OUTPUT
20mV/dB
0.2V TO 1.8V
3dB NOMINAL
INSERTION LOSS
+2.7V TO 5.5V
5-STAGE IF AMPLIFIER
(16dB PER STAGE)
7 FULL-WAVE
RECTIFIER CELLS
≈
≈
+2.7V TO 5.5V
LO INPUT
–16dBm
CMOS LOGIC
INPUT
±
6mA MAX OUTPUT
(
±
890mV INTO 165
)
100
18nF
1. –15dBm =
±
56mV MAX FOR LINEAR OPERATION
2. 39.76mV RMS TO 396.6mV RMS FOR
±
1 dB
RSSI ACCURACY
NOTES:
Figure 20. Functional Block Diagram
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| AD608AR | 功能描述:IC MIXER/LIMITER 3V IF 16-SOIC RoHS:否 類別:RF/IF 和 RFID >> RF 混頻器 系列:AD608 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- RF 型:W-CDMA 頻率:2.11GHz ~ 2.17GHz 混頻器數(shù)目:1 增益:17dB 噪音數(shù)據(jù):2.2dB 次要屬性:- 電流 - 電源:11.7mA 電源電壓:2.7 V ~ 3.3 V 包裝:托盤 封裝/外殼:12-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:12-QFN-EP（3x3） |
| AD608AR-REEL | 功能描述:IC MIXER/LIMITER 3V IF 16-SOIC RoHS:否 類別:RF/IF 和 RFID >> RF 混頻器 系列:AD608 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- RF 型:W-CDMA 頻率:2.11GHz ~ 2.17GHz 混頻器數(shù)目:1 增益:17dB 噪音數(shù)據(jù):2.2dB 次要屬性:- 電流 - 電源:11.7mA 電源電壓:2.7 V ~ 3.3 V 包裝:托盤 封裝/外殼:12-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:12-QFN-EP（3x3） |
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| AD608ARZ | 制造商:Analog Devices 功能描述:IC MIXER/LIMITER ((NW)) |
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