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參數(shù)資料
| 型號： | AD605BR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Dual, Low Noise, Single-Supply Variable Gain Amplifier |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 封裝： | MS-012-AC, SOIC-16 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 263K |
| 代理商： | AD605BR |
AD605
–9–
REV. C
From these equations one can see that all gain curves intercept
at the same –19 dB point; this intercept will be 14 dB higher
(–5 dB) if the FBK to OUT connection is left open. Outside
of the central linear range, the gain starts to deviate from the
ideal control law but still provides another 8.4 dB of range.
For a given gain scaling one can calculate V
REF
as shown in
Equation 6.
V
REF
=
2.500
V
×
20
dB
/
V
Gain Scale
(6)
35
30
25
20
15
10
5
0
–5
–10
–15
–20
G
40dB/V
30dB/V
20dB/V
LINEAR-IN-dB RANGE
OF AD605
1.0
GAIN CONTROL VOLTAGE
0.5
1.5
2.0
2.5
3.0
Figure 3. Ideal Gain Curves vs. V
REF
Usable gain control voltage ranges are 0.1 V to 2.9 V for 20 dB/V
scale and 0.1 V to 1.45 V for the 40 dB/V scale. VGN voltages
of less than 0.1 V are not used for gain control since below
50 mV the channel is powered down. This can be used to con-
serve power and at the same time gate-off the signal. The supply
current for a powered-down channel is 1.9 mA, the response
time to power the device on or off is less than 1
μ
s.
Active Feedback Amplifier (Fixed Gain Amp)
To achieve single-supply operation and a fully differential input
to the DSX, an active feedback amplifier (AFA) was utilized.
The AFA is basically an op amp with
two
g
m
stages; one of the
active stages is used in the feedback path (therefore the name),
while the other is used as a differential input. Note that the
differential input is an open-loop g
m
stage which requires that it
be highly linear over the expected input signal range. In this
design, the g
m
stage that senses the voltages on the attenuator is
a distributed one; for example, there are as many g
m
stages as
there are taps on the ladder network. Only a few of them are on
at any one time, depending on the gain control voltage.
R
–6.908dB
R
1.5R
1.5R
R
R
–13.82dB
R
1.5R
1.5R
R
–20.72dB
R
1.5R
1.5R
R
–27.63dB
R
1.5R
1.5R
R
–34.54dB
R
1.5R
1.5R
R
–41.45dB
R
1.5R
1.5R
R
–48.36dB
1.5R
1.5R
175
175
+IN
MID
–IN
NOTE: R = 96
1.5R = 144
Figure 2. R-1.5R Dual Ladder Network
One feature of the X-AMP architecture is that the output referred
noise is constant versus gain over most of the gain range. This
can be easily explained by looking at Figure 2 and observing
that the tap resistance is equal for all taps after only a few taps
away from the inputs. The resistance seen looking into each tap is
54.4
which makes 0.95 nV/
√
Hz
of Johnson noise spectral
density. Since there are two attenuators, the overall noise
contribution of the ladder network is
√
2
times 0.95 nV/
√
Hz
or 1.34 nV/
√
Hz
, a large fraction of the total DSX noise. The rest
of the DSX circuit components contribute another 1.20 nV/
√
Hz
which together with the attenuator produces 1.8 nV/
√
Hz
of
total DSX input referred noise.
AC Coupling
The DSX is a single, single-supply circuit and therefore its
inputs need to be ac-coupled to accommodate ground-based
signals. External capacitors C1 and C2 in Figure 1 level shift
the input signal from ground to the dc value established by
VOCM (nominal 2.5 V). C1 and C2, together with the 175
looking into each of DSX inputs (+IN and –IN), will act as
high-pass filters with corner frequencies depending on the
values chosen for C1 and C2. For example, if C1 and C2 are
0.1
μ
F, then together with the 175
input resistance of each
side of the differential ladder of the DSX, a –3 dB high-pass
corner at 9.1 kHz is formed.
If the DSX output needs to be ground referenced, then another
ac-coupling capacitor will be required for level shifting. This
capacitor will also eliminate any dc offsets contributed by the
DSX. With a nominal load of 500
and a 0.1
μ
F coupling
capacitor, this adds a high-pass filter with –3 dB corner fre-
quency at about 3.2 kHz.
The choice for all three of these coupling capacitors depends on
the application. They should allow the signals of interest to pass
unattenuated, while at the same time they can be used to limit
the low frequency noise in the system.
Gain Control Interface
The gain control interface provides an input resistance of
approximately 2 M
at pin VGN1 and gain scaling factors
from 20 dB/V to 40 dB/V for VREF input voltages of 2.5 V to
1.25 V, respectively. The gain varies linearly-in-dB for the cen-
ter 40 dB of gain range, that is for VGN equal to 0.4 V to 2.4 V
for the 20 dB/V scale, and 0.25 V to 1.25 V for the 40 dB/V
scale. Figure 3 shows the ideal gain curves when the FBK to
OUT connection is shorted as described by the following
equations:
G
(20
dB/V
)
=
20
×
VGN –
19
, VREF =
2.500
V
G
(30
dB/V
)
=
30
×
VGN –
19
, VREF =
1.6666
V
G
(40
dB/V
)
=
40
×
VGN –
19
, VREF =
1.250
V
(3)
(4)
(5)
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