
AD5930
Therefore, in this example, a time interval of 20 ns × 2047 = 40 μs
is the maximum, with the minimum being 40 ns. For some
applications, this maximum time of 40 μs may be insufficient.
Therefore, to cater for sweeps that need a longer increment
interval, time-base multipliers are provided. Bit D12 and Bit D11
are dedicated to the time-base multipliers (see Table 12). A more
detailed table of the multiplier options is given in Table 13.
Table 13. Time-Base Multiplier Values
D12
D11
Multiplier Value
0
0
Multiply (1/MCLK) by 1
0
1
Multiply (1/MCLK) by 5
1
0
Multiply (1/MCLK) by 100
1
1
Multiply (1/MCLK) by 500
Rev. 0 | Page 20 of 28
If MCLK is 50 MHz and a multiplier of 500 is used, then the
base interval (T
BASE
) is now (1/(50 MHz) x 500)) = 10 μs. Using
a multiplier of 500, the maximum increment interval is 10 μs ×
2
11 1
= 20.5 ms. Therefore, the option of time-base multipliers
gives the user enhanced flexibility when programming the
length of the frequency window, because any frequency can be
output for a minimum of 40 ns up to a maximum of 20.5 ms.
Length of Sweep Time
The length of time to complete a user-programmed frequency
sweep is given by the following equation:
T
SWEEP
= (1 + N
INCR
) × T
BASE
Burst Time Resister (T
BURST
)
As previously described in the Burst Output Mode section, the
AD5930 offers the user the ability to output each frequency in
the sweep for a length of time within the increment interval
(t
INT
), and then return to midscale for the remainder of the time
(t
INT
– T
BURST
) before stepping to the next frequency. The burst
option must be enabled. This is done by setting Bit D7 in the
control register to 0.
Similar to the time interval register, the burst register can have
its duration as:
A multiple of cycles of the output frequency
A multiple of MCLK periods
The address for this register is given in Table 14.
Table 14. T
BURST
Register Bits
D15
D14
D13
1
0
0
D12
x
D11
x
D10 to D0
11 bits of <0…10>
Fixed number of output
waveform cycles.
11 bits of <0…10>
Fixed number of clock
periods.
1
0
1
x
x
However, note that when using both the increment interval
(t
INT
) and burst time register (T
BURST
), the settings for Bit D13
should be the same. In instances where they differ, the AD5930
defaults to the value programmed into the t
INT
register.
Similarly, Bit 12 and Bit 11, the time-base multiplier bits, always
default to the value programmed into the t
INT
register.
ACTIVATING AND CONTROLLING THE SWEEP
After the registers have been programmed, a 0 ≥ 1 transition on
the CTRL pin starts the sweep. The sweep always starts from
the frequency programmed into the F
START
register. It changes by
the value in the
F register and increases by the number of
steps in the N
INCR
register. However, both the time interval and
burst duration of each frequency can be internally controlled
using the t
INT
and T
BURST
registers, or externally using the CTRL
pin. The options available are:
1.
auto-increment, auto-burst control
2.
external increment, auto-burst control
3.
external increment, external burst control
1.
Auto-Increment, Auto-Burst Control
The values in the t
INT
and T
BURST
registers are used to control the
sweep. The AD5930 bursts each frequency for the length of
time programmed in the T
BURST
register, and outputs midscale
for the remainder of the interval time (t
INT
– T
BURST
).
To set up the AD5930 to this mode, CW/BURST (Bit D7) in the
control register must be set to 0, INT/EXT BURST (Bit D6)
must be set to 0, and INT/EXT INCR (Bit D5) must be set to 0.
Note that if the part is only operating in continuous mode, then
(Bit D7) in the control register should be set to 1.
2.
External Increment, Auto-Burst Control
The time interval, t
INT
, is set by the pulse rate on the CTRL pin.
The first 0 ≥1 transition on the pin starts the sweep. Each
subsequent 0 ≥1 transition on the CTRL pin increments the
output frequency by the value programmed into the
F register.
For each increment interval, the AD5930 outputs each
frequency for the length of time programmed into the T
BURST
register, and outputs midscale until the CTRL pin is pulsed
again. Note that for this mode, the values programmed into Bit
D13, Bit D12, and bit D11 of the T
BURST
register are used.