V
參數(shù)資料
型號： AD5780ACPZ
廠商： Analog Devices Inc
文件頁數(shù)： 27/28頁
文件大小： 0K
描述： IC DAC VOLT OUT 18BIT 24LFCSP
標準包裝： 1
設置時間： 2.5µs
位數(shù)： 18
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 24-VFQFN 裸露焊盤，CSP
供應商設備封裝： 24-LFCSP-VQ EP（4x5）
包裝： 托盤
輸出數(shù)目和類型： 1 電壓，雙極
配用： EVAL-AD5780SDZ-ND - BOARD EVALUATION FOR AD5780
AD5780
Data Sheet
Rev. E | Page 8 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
2
1
3
4
5
6
7
18
19
17
16
15
14
13
LDAC
CLR
VDD
RESET
VDD
VREFP
VOUT
SCLK
SYNC
DGND
VREFN
VSS
AGND
NOTES
1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
2. NEGATIVE ANALOG SUPPLY CONNECTION (VSS).
A VOLTAGE IN THE RANGE OF –16.5 V TO –2.5 V
CAN BE CONNECTED. VSS SHOULD BE DECOUPLED
TO AGND. THE PADDLE CAN BE LEFT ELECTRICALLY
UNCONNECTED PROVIDED THAT A SUPPLY
CONNECTION IS MADE AT THE VSS PINS. IT IS
RECOMMENDED THAT THE PADDLE BE THERMALLY
CONNECTED TO A COPPER PLANE FOR ENHANCED
THERMAL PERFORMANCE.
9
1
0
1
2
8
IO
V
C
D
N
C
S
D
O
S
D
IN
V
C
AD5780
TOP VIEW
(Not to Scale)
2
1
2
0
2
D
N
C
R
F
B
D
N
C
2
3
D
N
C
2
4
IN
V
0
964
9-
00
5
Figure 4. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VOUT
Analog Output Voltage.
2
VREFP
Positive Reference Voltage Input. A voltage in the range of 5 V to VDD 2.5 V can be connected to this pin.
3, 5
VDD
Positive Analog Supply Connection. A voltage in the range of 7.5 V to 16.5 V can be connected to this pin. VDD must
be decoupled to AGND.
4
RESET
Active Low Reset. Asserting this pin returns the AD5780 to its power-on status.
6
CLR
Active Low Input. Asserting this pin sets the DAC register to a user defined value (see Table 12) and updates the DAC
output. The output value depends on the DAC register coding that is being used, either binary or twos complement.
7
LDAC
Active Low Load DAC Logic Input. This pin is used to update the DAC register and, consequently, the analog output.
When tied permanently low, the output is updated on the rising edge of SYNC. If LDAC is held high during the write
cycle, the input register is updated, but the output update is held off until the falling edge of LDAC. Do not leave
the LDAC pin unconnected.
8
VCC
Digital Supply. Voltage range is from 2.7 V to 5.5 V. VCC should be decoupled to DGND.
9
IOVCC
Digital Interface Supply. Digital threshold levels are referenced to the voltage applied to this pin. Voltage range is
from 1.71 V to 5.5 V.
10, 21,
22, 23
DNC
Do Not Connect. Do not connect to these pins.
11
SDO
Serial Data Output. Data is clocked out on the rising edge of the serial clock input.
12
SDIN
Serial Data Input. This device has a 24-bit input shift register. Data is clocked into the register on the falling edge of
the serial clock input.
13
SCLK
Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial clock input. Data can
be transferred at rates of up to 35 MHz.
14
SYNC
Level Triggered Control Input (Active Low). This is the frame synchronization signal for the input data. When SYNC
goes low, it enables the input shift register, and data is then transferred in on the falling edges of the following
clocks. The DAC is updated on the rising edge of SYNC.
15
DGND
Ground Reference Pin for Digital Circuitry.
16
VREFN
Negative Reference Voltage Input.
17, 18
VSS
Negative Analog Supply Connection. A voltage in the range of 16.5 V to 2.5 V can be connected to this pin.
VSS must be decoupled to AGND.
19
AGND
Ground Reference Pin for Analog Circuitry.
20
RFB
Feedback Connection for External Amplifier. See the AD5780 Features section for further details.
24
INV
Inverting Input Connection for External Amplifier. See the AD5780 Features section for further details.
EPAD
VSS
Negative Analog Supply Connection (VSS). A voltage in the range of 16.5 V to 2.5 V can be connected to this pin.
VSS must be decoupled to AGND. The paddle can be left electrically unconnected provided that a supply connection is
made at the VSS pins. It is recommended that the paddle be thermally connected to a copper plane for enhanced
thermal performance.
相關PDF資料
PDF描述
VE-BW2-MV-F3 CONVERTER MOD DC/DC 15V 150W
AD5544BRSZ IC DAC 16BIT SER QUAD 28SSOP
VE-BWV-MY-F1 CONVERTER MOD DC/DC 5.8V 50W
AD7228ACNZ IC DAC 8BIT OCTAL W/AMP 24DIP
MS27468T15B5PLC CONN HSG RCPT 5POS JAMNUT PINS
相關代理商/技術參數(shù)
參數(shù)描述
AD5780ACPZ-REEL7 功能描述:數(shù)模轉(zhuǎn)換器- DAC 18-Bit +/-1 LSB INL VOut RoHS:否 制造商:Analog Devices 轉(zhuǎn)換器數(shù)量:4 DAC 輸出端數(shù)量:4 轉(zhuǎn)換速率: 分辨率:12 bit 接口類型:Serial (I2C) 穩(wěn)定時間: 最大工作溫度:+ 105 C 安裝風格: 封裝 / 箱體:TSSOP 封裝:Reel
AD5780BCPZ 功能描述:IC DAC VOLT OUT 18BIT 24LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 設置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND
AD5780BCPZ-REEL7 制造商:Analog Devices 功能描述:DAC 1-CH Segment 18-bit 24-Pin LFCSP EP T/R 制造商:Analog Devices 功能描述:18BIT, 1LSB, BUFFERED REF - Tape and Reel 制造商:Analog Devices 功能描述:IC DAC VOLT OUT 18BIT 24LFCSP 制造商:Analog Devices Inc. 功能描述:Digital to Analog Converters - DAC 18bit 1LSB buffered Ref 制造商:Analog Devices 功能描述:CONVERTER - DAC
AD5781 制造商:AD 制造商全稱:Analog Devices 功能描述:Ultra Stable, 16-Bit ±0.5 LSB INL
AD5781ARUZ 功能描述:IC DAC 18BIT SRL 20TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 設置時間:4.5µs 位數(shù):12 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOICN 包裝:剪切帶 (CT) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:* 其它名稱:MCP4921T-E/SNCTMCP4921T-E/SNRCTMCP4921T-E/SNRCT-ND
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*