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參數(shù)資料
| 型號： | AD5664BRMZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/24頁 |
| 文件大小： | 0K |
| 描述： | IC DAC NANO 16BIT QUAD 10-MSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 50 |
| 系列： | nanoDAC™ |
| 設(shè)置時間： | 4µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 4 電壓，單極；4 電壓，雙極 |
| 采樣率（每秒）： | 223k |
| 產(chǎn)品目錄頁面： | 783 (CN2011-ZH PDF) |
| 配用： | EVAL-AD5664REBZ-ND - BOARD EVALUATION FOR AD5664R |
AD5624/AD5664
Rev. 0 | Page 21 of 24
BIPOLAR OPERATION USING THE
AD5624/AD5664
The AD5624/AD5664 have been designed for single-supply
operation, but a bipolar output range is also possible using the
circuit in Figure 40. The circuit gives an output voltage range of
±5 V. Rail-to-rail operation at the amplifier output is achievable
The output voltage for any input code can be calculated as
follows:
×
+
×
×
=
R1
R2
V
R1
R2
R1
D
V
DD
O
536
,
65
where D represents the input code in decimal (0 to 65536).
With VDD = 5 V, R1 = R2 = 10 kΩ,
V
5
536
,
65
10
×
=
D
VO
This is an output voltage range of ±5 V, with 0x0000 corre-
sponding to a 5 V output, and 0xFFFF corresponding to a
+5 V output.
3-WIRE
SERIAL
INTERFACE
R2 = 10k
+5V
–5V
AD820/
OP295
+5V
AD5624/
AD5664
VDD
VOUT
R1 = 10k
±5V
0.1F
10F
059
43
-04
3
Figure 40. Bipolar Operation with the AD5624/AD5664
USING AD5624/AD5664 WITH A
GALVANICALLY ISOLATED INTERFACE
In process control applications in industrial environments, it is
often necessary to use a galvanically isolated interface to protect
and isolate the controlling circuitry from any hazardous
common-mode voltages that might occur in the area where the
DAC is functioning. Isocouplers provide isolation in excess of
3 kV. The AD5624/AD5664 use a 3-wire serial logic interface,
so the ADuM130x 3-channel digital isolator provides the
required isolation (see Figure 41). The power supply to the part
also needs to be isolated, which is done by using a transformer.
On the DAC side of the transformer, a 5 V regulator provides
the 5 V supply required for the AD5624/AD5664.
0.1F
5V
REGULATOR
GND
DIN
SYNC
SCLK
POWER
10F
SDI
SCLK
DATA
AD5624/
AD5664
VOUT
VOB
VOA
VOC
VDD
V1C
V1B
V1A
ADuM1300
05
94
3-
0
44
Figure 41. AD5624/AD5664 with a Galvanically Isolated Interface
POWER SUPPLY BYPASSING AND GROUNDING
When accuracy is important in a circuit, it is helpful to consider
carefully the power supply and ground return layout on the
board. The printed circuit board containing the AD5624/
AD5664 should have separate analog and digital sections, each
having its own area of the board. If the AD5624/AD5664 is in a
system where other devices require an AGND-to-DGND
connection, the connection should be made at one point only.
This ground point should be as close as possible to the
AD5624/AD5664.
The power supply to the AD5624/AD5664 should be bypassed
with 10 μF and 0.1 μF capacitors. The capacitors should be
located as close as possible to the device, with the 0.1 μF capacitor
ideally right up against the device. The 10 μF capacitor is the
tantalum bead type. It is important that the 0.1 μF capacitor has
low effective series resistance (ESR) and effective series
inductance (ESI), for example, common ceramic types of
capacitors. This 0.1 μF capacitor provides a low impedance path
to ground for high frequencies caused by transient currents due
to internal logic switching.
The power supply line itself should have as large a trace as
possible to provide a low impedance path and to reduce glitch
effects on the supply line. Clocks and other fast switching
digital signals should be shielded from other parts of the board
by digital ground. Avoid crossover of digital and analog signals
if possible. When traces cross on opposite sides of the board,
ensure that they run at right angles to each other to reduce
feedthrough effects through the board. The best board layout
technique is the microstrip technique where the component
side of the board is dedicated to the ground plane only and the
signal traces are placed on the solder side. However, this is not
always possible with a 2-layer board.
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