VDD
參數(shù)資料
型號(hào): AD5547CRUZ
廠商: Analog Devices Inc
文件頁數(shù): 14/20頁
文件大?。?/td> 0K
描述: IC DAC 16BIT PAR DUAL 38TSSOP
設(shè)計(jì)資源: Precision, Unipolar, Inverting Conversion Using AD5547/57 DAC (CN0026)
Precision, Unipolar, Noninverting Configuration for the AD5547/57 DAC (CN0027)
Precision, Bipolar, Configuration for AD5547/AD5557 DAC (CN0028)
標(biāo)準(zhǔn)包裝: 1
設(shè)置時(shí)間: 500ns
位數(shù): 16
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 55µW
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 38-TFSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 38-TSSOP
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 2M
產(chǎn)品目錄頁面: 783 (CN2011-ZH PDF)
Data Sheet
AD5547/AD5557
Rev. D | Page 3 of 20
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VDD = 2.7 V to 5.5 V, IOUT = virtual GND, GND = 0 V, VREF = 10 V to +10 V, TA = 40°C to +125°C, unless otherwise noted.
Table 1.
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
STATIC PERFORMANCE1
Resolution
N
AD5547, 1 LSB = V
REF/2
16 = 153 V at V
REF = 10 V
16
Bits
AD5557, 1 LSB = V
REF/2
14 = 610 V at V
REF = 10 V
14
Bits
Relative Accuracy
INL
±1
LSB
±2
LSB
±1
LSB
Differential Nonlinearity
DNL
Monotonic
±1
LSB
Output Leakage Current
I
OUT
Data = zero scale, T
A = 25°C
10
nA
Data = zero scale, T
A = TA maximum
20
nA
Full-Scale Gain Error
G
FSE
Data = full scale
±1
±4
mV
Bipolar Mode Gain Error
G
E
Data = full scale
±1
±4
mV
Bipolar Mode Zero-Scale Error
G
ZSE
Data = full scale
±1
±3
mV
Full-Scale Temperature Coefficient2
TCV
FS
1
ppm/°C
REFERENCE INPUT
V
REF Range
V
REF
18
+18
V
REF Input Resistance
REF
4
5
6
k
R1 and R2 Resistance
R1 and R2
4
5
6
k
R1-to-R2 Mismatch
Δ(R1 to R2)
±0.5
±1.5
Feedback and Offset Resistance
R
FB, ROFS
8
10
12
k
Input Capacitance2
C
REF
5
pF
ANALOG OUTPUT
Output Current
I
OUT
Data = full scale
2
mA
Output Capacitance2
C
OUT
Code dependent
200
pF
LOGIC INPUT AND OUTPUT
Logic Input Low Voltage
V
IL
V
DD = 5 V
0.8
V
DD = 3 V
0.4
V
Logic Input High Voltage
V
IH
V
DD = 5 V
2.4
V
DD = 3 V
2.1
V
Input Leakage Current
I
IL
10
A
Input Capacitance2
C
IL
10
pF
INTERFACE TIMING2, 3
Data to WR Setup Time
t
DS
V
DD = 5 V
20
ns
V
DD = 3 V
35
ns
Data to WR Hold Time
t
DH
V
DD = 5 V
0
ns
V
DD = 3 V
0
ns
WR Pulse Width
t
WR
V
DD = 5 V
20
ns
V
DD = 3 V
35
ns
LDAC Pulse Width
t
LDAC
V
DD = 5 V
20
ns
V
DD = 3 V
35
ns
RS Pulse Width
t
RS
V
DD = 5 V
20
ns
V
DD = 3 V
35
ns
WR to LDAC Delay Time
t
LWD
V
DD = 5 V
0
ns
V
DD = 3 V
0
ns
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