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參數(shù)資料
| 型號(hào)： | AD5544 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Quad, Current-Output Serial-Input, 16-Bit/14-Bit DACs |
| 中文描述： | 四，電流輸出串行輸入，16-Bit/14-Bit數(shù)模轉(zhuǎn)換器 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大小： | 473K |
| 代理商： | AD5544 |
REV. 0
AD5544/AD5554
–8–
AD5544/AD5554 PIN FUNCTION DESCRIPTIONS
Pin # Name
Function
1
2
3
4
5
6
A
GND
A
I
OUT
A
V
REF
A
R
FB
A
MSB
RS
DAC A Analog Ground.
DAC A Current Output.
DAC A Reference Voltage Input Terminal. Establishes DAC A full-scale output voltage. Pin can be tied to V
DD
pin.
Establish Voltage Output for DAC A by Connecting to External Amplifier Output.
MSB Bit Set Pin During a Reset Pulse (
RS
) or at System Power ON if Tied to Ground or V
DD
.
Reset Pin, Active Low Input. Input registers and DAC registers are set to all zeros or half-scale code (8000
H
for
AD5544 and 2000
H
for AD5554) determined by the voltage on the MSB pin. Register Data = 0000
H
when MSB
= 0. Register Data = 8000
H
for AD5544 and 2000
H
for AD5554 when MSB = 1.
Positive Power Supply Input. Specified range of operation 5 V
±
10%.
Chip Select, Active Low Input. Disables shift register loading when high. Transfers serial register data to the Input
Register when
CS
/
LDAC
returns High. Does not effect
LDAC
operation.
Clock Input, Positive Edge Clocks Data into Shift Register.
Serial Data Input, Input Data Loads Directly into the Shift Register.
Establish Voltage Output for DAC B by Connecting to External Amplifier Output.
DAC B Reference Voltage Input Terminal. Establishes DAC B full-scale output voltage. Pin can be tied to V
DD
pin.
DAC B Current Output.
DAC B Analog Ground.
DAC C Analog Ground.
DAC C Current Output.
DAC C Reference Voltage Input Terminal. Establishes DAC C full-scale output voltage. Pin can be tied to V
DD
pin.
Establish voltage output for DAC C by connecting to external amplifier output.
No Connect. Leave pin unconnected.
Serial Data Output, input data loads directly into the shift register. Data appears at SDO, 19 clock pulses for
AD5544 and 17 clock pulses for AD5554 after input at the SDI pin.
Load DAC Register Strobe, Level Sensitive Active Low. Transfers all Input Register data to DAC registers. Asyn-
chronous active low input. See Control Logic Truth Table for operation.
High Current Analog Force Ground.
Negative Bias Power Supply Input. Specified range of operation –0.3 V to –5.5 V.
Digital Ground Pin.
Establish Voltage Output for DAC D by Connecting to External Amplifier Output.
DAC D Reference Voltage Input Terminal. Establishes DAC D full-scale output voltage. Pin can be tied to V
DD
pin.
DAC D Current Output.
DAC D Analog Ground.
7
8
V
DD
CS
9
10
11
12
13
14
15
16
17
18
19
20
CLK
SDI
R
FB
B
V
REF
B
I
OUT
B
A
GND
B
A
GND
C
I
OUT
C
V
REF
C
R
FB
C
NC
SDO
21
LDAC
22
23
24
25
26
27
28
A
GND
F
V
SS
DGND
R
FB
D
V
REF
D
I
OUT
D
A
GND
D
AD5544/AD5554 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD5544/
AD5554
A
GND
A
I
OUT
A
V
REF
A
R
FB
A
MSB
A
GND
D
I
OUT
D
V
REF
D
R
FB
D
DGND
RS
V
SS
A
GND
F
V
DD
CS
LDAC
CLK
SDO
SDI
NC
R
FB
B
V
REF
B
I
OUT
B
A
GND
B
R
FB
C
V
REF
C
I
OUT
C
A
GND
C
NC = NO CONNECT
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| AD5544_04 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad, Current-Output, Serial-Input 16-/14-Bit DACs |
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| AD5544ACPZ-1-R2 | 功能描述:IC DAC 16BIT SRL QUAD 32LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
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