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參數(shù)資料
| 型號： | AD5542AR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 5 V, Serial-Input Voltage-Output, 16-Bit DACs |
| 中文描述： | SERIAL INPUT LOADING, 1 us SETTLING TIME, 16-BIT DAC, PDSO14 |
| 封裝： | MS-012AB, SOIC-14 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 186K |
| 代理商： | AD5542AR |
AD5541/AD5542
–6–
REV. A
TERMINOLOGY
Relative Accuracy
For the DAC, relative accuracy or integral nonlinearity (INL)
is a measure of the maximum deviation, in LSBs, from a straight
line passing through the endpoints of the DAC transfer function.
A typical INL versus code plot can be seen in Figure 2.
Differential Nonlinearity
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of
±
1 LSB maximum
ensures monotonicity. Figure 3 illustrates a typical DNL versus
code plot.
Gain Error
Gain error is the difference between the actual and ideal analog
output range, expressed as a percent of the full-scale range.
It is the deviation in slope of the DAC transfer characteristic
from ideal.
Gain Error Temperature Coefficient
This is a measure of the change in gain error with changes in
temperature. It is expressed in ppm/
°
C.
Zero Code Error
Zero code error is a measure of the output error when zero code
is loaded to the DAC register.
Zero Code Temperature Coefficient
This is a measure of the change in zero code error with a change
in temperature. It is expressed in mV/
°
C.
Digital-to-Analog Glitch Impulse
Digital-to-analog glitch impulse is the impulse injected into the
analog output when the input code in the DAC register changes
state. It is normally specified as the area of the glitch in nV-s
and is measured when the digital input code is changed by 1 LSB
at the major carry transition. A plot of the glitch impulse is shown
in Figure 15.
Digital Feedthrough
Digital feedthrough is a measure of the impulse injected into the
analog output of the DAC from the digital inputs of the DAC,
but is measured when the DAC output is not updated.
CS
is
held high, while the CLK and DIN signals are toggled. It is
specified in nV-s and is measured with a full-scale code change
on the data bus, i.e., from all 0s to all 1s and vice versa. A typi-
cal plot of digital feedthrough is shown in Figure 14.
Power Supply Rejection Ratio
This specification indicates how the output of the DAC is affected
by changes in the power supply voltage. Power-supply rejection
ratio is quoted in terms of % change in output per % change in
V
DD
for full-scale output of the DAC. V
DD
is varied by
±
10%.
Reference Feedthrough
This is a measure of the feedthrough from the V
REF
input to the
DAC output when the DAC is loaded with all 0s. A 100 kHz,
1 V p-p is applied to V
REF
. Reference feedthrough is expressed
in mV p-p.
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