- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8983 > AD5453YRMZ (Analog Devices Inc)IC DAC 14BIT MULTIPLYING 8-MSOP PDF資料下載
參數(shù)資料
| 型號(hào)： | AD5453YRMZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 11/28頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT MULTIPLYING 8-MSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 設(shè)計(jì)資源： | Unipolar, Precision DC Digital-to-Analog Conversion using AD5450/1/2/3 8-14-Bit DACs (CN0052) Precision, Bipolar, Configuration for AD5450/1/2/3 8-14bit Multiplying DACs (CN0053) AC Signal Processing Using AD5450/1/2/3 Current Output DACs (CN0054) Programmable Gain Element Using AD5450/1/2/3 Current Output DAC Family (CN0055) |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 1 電流，單極；1 電流，雙極 |
| 采樣率（每秒）： | 2.7M |
| 產(chǎn)品目錄頁(yè)面： | 782 (CN2011-ZH PDF) |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)當(dāng)前第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)
Data Sheet
AD5450/AD5451/AD5452/AD5453
Rev. G | Page 19 of 28
DIVIDER OR PROGRAMMABLE GAIN ELEMENT
Current-steering DACs are very flexible and lend themselves to
many different applications. If this type of DAC is connected as
the feedback element of an op amp and RFB is used as the input
resistor as shown in Figure 49, the output voltage is inversely
proportional to the digital input fraction, D.
For D = 1 2n, the output voltage is
(
)n
IN
OUT
V
D
V
=
=
2
1
As D is reduced, the output voltage increases. For small values
of the digital fraction, D, it is important to ensure that the
amplifier does not saturate and that the required accuracy is
met. For example, an 8-bit DAC driven with the binary code
0x10 (00010000), that is, 16 decimal, in the circuit of Figure 49
should cause the output voltage to be 16 times VIN.
04587-014
NOTE
ADDITIONAL PINS OMITTED FOR CLARITY
RFB
IOUT1
VREF
GND
VDD
VOUT
VIN
Figure 49. Current-Steering DAC Used as a Divider or
Programmable Gain Element
However, if the DAC has a linearity specification of ±0.5 LSB, D
can have weight anywhere in the range of 15.5/256 to 16.5/256.
Therefore, the possible output voltage is in the range of 15.5 VIN
to 16.5 VIN—an error of 3%, even though the DAC itself has a
maximum error of 0.2%.
DAC leakage current is also a potential error source in divider
circuits. The leakage current must be counterbalanced by an
opposite current supplied from the op amp through the DAC.
Because only a fraction, D, of the current in the VREF terminal is
routed to the IOUT1 terminal, the output voltage changes as follows:
Output Error Voltage Dueto Leakage = (Leakage × R)/D
where R is the DAC resistance at the VREF terminal.
For a DAC leakage current of 10 nA, R = 10 k, and a gain
(that is, 1/D) of 16, the error voltage is 1.6 mV.
REFERENCE SELECTION
When selecting a reference for use with this series of current-
output DACs, pay attention to the reference’s output voltage
temperature coefficient specification. This parameter not only
affects the full-scale error, but also may affect the linearity (INL
and DNL) performance. The reference temperature coefficient
should be consistent with the system accuracy specifications.
For example, an 8-bit system is required to hold its overall
specification to within 1 LSB over the temperature range 0°C to
50°C, and the system’s maximum temperature drift should be
less than 78 ppm/°C.
A 12-bit system within 2 LSB accuracy requires a maximum
drift of 10 ppm/°C. Choosing a precision reference with a low
output temperature coefficient minimizes this error source.
Table 7 lists some dc references available from Analog Devices
that are suitable for use with this range of current-output DACs.
AMPLIFIER SELECTION
The primary requirement for the current-steering mode is an
amplifier with low input bias currents and low input offset voltage.
The input offset voltage of an op amp is multiplied by the variable
gain of the circuit due to the code-dependent output resistance of
the DAC. A change in this noise gain between two adjacent digital
fractions produces a step change in the output voltage due to the
offset voltage of the amplifier’s input. This output voltage change
is superimposed on the desired change in output between the two
codes and gives rise to a differential linearity error, which if
large enough, could cause the DAC to be nonmonotonic.
The input bias current of an op amp generates an offset at the
voltage output as a result of the bias current flowing in the
feedback resistor, RFB. Most op amps have input bias currents
low enough to prevent significant errors in 12-bit applications.
However, for 14-bit applications, some consideration should be
given to selecting an appropriate amplifier.
Common-mode rejection of the op amp is important in voltage-
switching circuits because it produces a code-dependent error
at the voltage output of the circuit. Most op amps have adequate
common-mode rejection for use at 8-, 10-, and 12-bit resolutions.
Provided that the DAC switches are driven from true wideband
low impedance sources (VIN and AGND), they settle quickly.
Consequently, the slew rate and settling time of a voltage-
switching DAC circuit is determined largely by the output op
amp. To obtain minimum settling time in this configuration, it
is important to minimize capacitance at the VREF node (the voltage
output node in this application) of the DAC. This is done by using
low input-capacitance buffer amplifiers and careful board design.
Most single-supply circuits include ground as part of the analog
signal range, which in turn requires an amplifier that can handle
rail-to-rail signals. There is a large range of single-supply amplifiers
available from Analog Devices.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS843156AKILFT | IC CLK GENERATOR 32VFQFP |
| VI-B0P-MY-F4 | CONVERTER MOD DC/DC 13.8V 50W |
| VI-B0P-MY-F3 | CONVERTER MOD DC/DC 13.8V 50W |
| VE-J0M-MZ-F1 | CONVERTER MOD DC/DC 10V 25W |
| VI-B0N-MY-F4 | CONVERTER MOD DC/DC 18.5V 50W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD5453YRMZ-REEL | 功能描述:IC DAC 14BIT MULTIPLYING 8-MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標(biāo)準(zhǔn)包裝:91 系列:- 設(shè)置時(shí)間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| AD5453YRMZ-REEL7 | 功能描述:IC DAC 14BIT MULTIPLYING 8-MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁(yè)面:1398 (CN2011-ZH PDF) |
| AD5453YUJ | 制造商:AD 制造商全稱:Analog Devices 功能描述:8/10/12/14-Bit High Bandwidth Multiplying DACs with Serial Interface |
| AD5453YUJ-REEL | 制造商:Analog Devices 功能描述:DAC 1-CH Segment 14-bit 8-Pin TSOT T/R |
| AD5453YUJ-REEL7 | 制造商:Analog Devices 功能描述:DAC 1-CH Segment 14-bit 8-Pin TSOT T/R 制造商:Rochester Electronics LLC 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。