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參數(shù)資料
型號(hào)： AD5424YCPZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 15/29頁(yè)
文件大?。?/td> 0K
描述： IC DAC 8BIT MULTIPLYING 20-LFCSP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 1,500
設(shè)置時(shí)間： 30ns
位數(shù)： 8
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
功率耗散（最大）： 25µW
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 20-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 20-LFCSP-VQ
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 2 電流，單極；2 電流，雙極
采樣率（每秒）： 20.4M
配用： EVAL-AD5424EBZ-ND - BOARD EVALUATION FOR AD5424
Data Sheet
AD5424/AD5433/AD5445
Rev. D | Page 21 of 28
ADDING GAIN
In applications where the output voltage is required to be
greater than VIN, gain can be added with an additional external
amplifier or it can be achieved in a single stage. It is important
to consider the effect of the temperature coefficients of the thin
film resistors of the DAC. Simply placing a resistor in series with
the RFB resistor causes mismatches in the temperature coefficients
and results in larger gain temperature coefficient errors. Instead,
the circuit shown in Figure 54 is a recommended method of
increasing the gain of the circuit. R1, R2, and R3 should have
similar temperature coefficients, but they need not match
the temperature coefficients of the DAC. This approach is
recommended in circuits where gains greater than 1 are
required.
03160-
054
8-/10-/12-BIT
DAC
GND
VDD
RFB
VDD
VOUT
VREF
VIN
ADDITIONAL PINS OMITTED FOR CLARITY
C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE
REQUIRED IF A1 IS A HIGH SPEED AMPLIFIER.
NOTES:
1.
2.
C1
R1
IOUT1
IOUT2
R1 =
GAIN =
R2 + R3
R2
R3
R2
R2R3
R2 + R3
Figure 54. Increasing the Gain of the Current Output DAC
DACS USED AS A DIVIDER OR PROGRAMMABLE
GAIN ELEMENT
Current steering DACs are very flexible and lend themselves to
many different applications. If this type of DAC is connected as
the feedback element of an op amp and RFB is used as the input
resistor, as shown in Figure 55, then the output voltage is
inversely proportional to the digital input fraction, D.
For D = 1 – 2–n the output voltage is
VOUT = –VIN/D = –VIN/(1 2–n)
As D is reduced, the output voltage increases. For small values
of D, it is important to ensure that the amplifier does not saturate
and that the required accuracy is met.
For example, in the circuit shown in Figure 55, an 8-bit DAC
driven with the binary code 0x10 (00010000), that is, 16 decimal,
should cause the output voltage to be 16 × VIN. However, if the
DAC has a linearity specification of ±0.5 LSB, then D can in fact
have a weight anywhere in the range 15.5/256 to 16.5/256 so
that the possible output voltage falls in the range 15.5 VIN to
16.5 VIN—an error of 3% even though the DAC itself has a
maximum error of 0.2%.
03160-055
GND
RFB
VDD
VOUT
VREF
VIN
NOTE:
ADDITIONAL PINS OMITTED FOR CLARITY
IOUT1
IOUT2
Figure 55. Current-Steering DAC Used as a Divider or
Programmable Gain Element
DAC leakage current is also a potential error source in divider
circuits. The leakage current must be counterbalanced by an
opposite current supplied from the op amp through the DAC.
Since only a fraction, D, of the current into the VREF terminal is
routed to the IOUT1 terminal, the output voltage has to change
as follows:
Output Error Voltage due to DAC Leakage = (Leakage × R)/D
where R is the DAC resistance at the VREF terminal.
For a DAC leakage current of 10 nA, R = 10 kΩ, and a gain
(that is, 1/D) of 16, the error voltage is 1.6 mV.
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