- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄8975 > AD5422BREZ (Analog Devices Inc)IC DAC 16BIT 1CH 24TSSOP PDF資料下載
參數(shù)資料
| 型號(hào)： | AD5422BREZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 18/44頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT 1CH 24TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Power Line Monitoring Data Converter Fundamentals DAC Architectures |
| 設(shè)計(jì)資源： | 16-Bit Fully Isolated Output Module Using AD5422 and ADuM1401 (CN0065) Simplified 16-Bit Voltage Output and 4 mA-to-20 mA Output Solution Using AD5422 (CN0077) |
| 標(biāo)準(zhǔn)包裝： | 62 |
| 設(shè)置時(shí)間： | 25µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 功率耗散（最大）： | 950mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm）裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP 裸露焊盤(pán) |
| 包裝： | 管件 |
| 輸出數(shù)目和類(lèi)型： | 1 電流，單極；1 電流，雙極；1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 40k |
| 產(chǎn)品目錄頁(yè)面： | 782 (CN2011-ZH PDF) |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)當(dāng)前第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)
Data Sheet
AD5412/AD5422
Rev. I | Page 25 of 44
TERMINOLOGY
Relative Accuracy or Integral Nonlinearity (INL)
For the DAC, relative accuracy, or INL, is a measure of the
maximum deviation, in LSBs, from a straight line passing
through the endpoints of the DAC transfer function. A typical
INL vs. code plot can be seen in Figure 17.
Differential Nonlinearity (DNL)
DNL is the difference between the measured change and the
ideal 1 LSB change between any two adjacent codes. A specified
differential nonlinearity of ±1 LSB maximum ensures monoton-
icity. This DAC is guaranteed monotonic by design. A typical
DNL vs. code plot can be seen in Figure 19.
Monotonicity
A DAC is monotonic if the output either increases or remains
are monotonic over their full operating temperature range.
Bipolar Zero Error
Bipolar zero error is the deviation of the analog output from the
ideal half-scale output of 0 V when the DAC register is loaded
with 0x8000 (straight binary coding) or 0x0000 (twos comple-
ment coding). A plot of bipolar zero error vs. temperature can
be seen in Figure 28.
Bipolar Zero Temperature Coefficient (TC)
Bipolar zero TC is a measure of the change in the bipolar zero
error with a change in temperature. It is expressed in ppm FSR/°C.
Full-Scale Error
Full-scale error is a measure of the output error when full-scale
code is loaded to the DAC register. Ideally, the output should be
full-scale 1 LSB. Full-scale error is expressed in percent of
full-scale range (% FSR).
Negative Full-Scale Error/Zero-Scale Error
Negative full-scale error is the error in the DAC output voltage
when 0x0000 (straight binary coding) or 0x8000 (twos comple-
ment coding) is loaded to the DAC register. Ideally, the output
voltage should be negative full-scale 1 LSB. A plot of zero-
scale error vs. temperature can be seen in Figure 30.
Zero-Scale Temperature Coefficient (TC)
Zero-scale TC is a measure of the change in zero-scale error
with a change in temperature. Zero-scale error TC is expressed
in ppm FSR/°C.
Output Voltage Settling Time
Output voltage settling time is the amount of time it takes for the
output to settle to a specified level for a full-scale input change.
Slew Rate
The slew rate of a device is a limitation in the rate of change
of the output voltage. The output slewing speed of a voltage-
output DAC is usually limited by the slew rate of the amplifier
used at its output. Slew rate is measured from 10% to 90% of the
output signal and is expressed in V/s.
Gain Error
Gain error is a measure of the span error of the DAC. It is the
deviation in slope of the DAC transfer characteristic from the
ideal expressed in % FSR. A plot of gain error vs. temperature
can be seen in Figure 29.
Gain Error Temperature Coefficient (TC)
Gain error TC is a measure of the change in gain error with
changes in temperature. Gain error TC is expressed in ppm
FSR/°C.
Total Unadjusted Error (TUE)
TUE is a measure of the output error taking all the various
errors into account, namely INL error, offset error, gain error,
and output drift over supplies, temperature, and time. TUE is
expressed in % FSR.
Current Loop Voltage Compliance
The maximum voltage at the IOUT pin for which the output
current is equal to the programmed value.
Power-On Glitch Energy
Power-on glitch energy is the impulse injected into the analog
as the area of the glitch in nV-sec. See Figure 43 and Figure 60.
Digital-to-Analog Glitch Impulse
Digital-to-analog glitch impulse is the impulse injected into the
analog output when the input code in the DAC register changes
state, but the output voltage remains constant. It is normally
specified as the area of the glitch in nV-sec and is measured
when the digital input code is changed by 1 LSB at the major
carry transition (0x7FFF to 0x8000). See Figure 40 and
Glitch Impulse Peak Amplitude
Glitch impulse peak amplitude is the peak amplitude of the
impulse injected into the analog output when the input code in
the DAC register changes state. It is specified as the amplitude
of the glitch in millivolt and is measured when the digital input
code is changed by 1 LSB at the major carry transition (0x7FFF
to 0x8000). See Figure 40 and Figure 63.
Digital Feedthrough
Digital feedthrough is a measure of the impulse injected into
the analog output of the DAC from the digital inputs of the
DAC but is measured when the DAC output is not updated.
It is specified in nV-sec and measured with a full-scale code
change on the data bus.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VI-BTT-MY-F4 | CONVERTER MOD DC/DC 6.5V 50W |
| VE-J4D-MZ-F2 | CONVERTER MOD DC/DC 85V 25W |
| VE-B4Z-MU-F1 | CONVERTER MOD DC/DC 2V 80W |
| VI-BTT-MY-F3 | CONVERTER MOD DC/DC 6.5V 50W |
| LTC1454IS#PBF | IC D/A CONV 12BIT R-R DUAL16SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD5422BREZ-REEL | 功能描述:IC DAC 16BIT 1CH SRL INP 24TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:47 系列:- 設(shè)置時(shí)間:2µs 位數(shù):14 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:55µW 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:管件 輸出數(shù)目和類(lèi)型:1 電流，單極；1 電流，雙極 采樣率（每秒）:* |
| AD5424 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual 8-,10-,12-Bit High Bandwidth Multiplying DACs with Serial Interface |
| AD5424_1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:8-/10-/12-Bit, High Bandwidth Multiplying DACs with Parallel Interface |
| AD5424BRU | 制造商:Analog Devices 功能描述:DAC SGL R-2R 8BIT 16TSSOP - Bulk |
| AD5424YCP | 制造商:Analog Devices 功能描述:DAC 1-CH R-2R 8-bit 20-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:8-BIT IOUT DAC PARELLED INT/FACE I.C. - Bulk |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。