參數(shù)資料
型號(hào): AD5422BREZ
廠商: Analog Devices Inc
文件頁數(shù): 14/44頁
文件大?。?/td> 0K
描述: IC DAC 16BIT 1CH 24TSSOP
產(chǎn)品培訓(xùn)模塊: Power Line Monitoring
Data Converter Fundamentals
DAC Architectures
設(shè)計(jì)資源: 16-Bit Fully Isolated Output Module Using AD5422 and ADuM1401 (CN0065)
Simplified 16-Bit Voltage Output and 4 mA-to-20 mA Output Solution Using AD5422 (CN0077)
標(biāo)準(zhǔn)包裝: 62
設(shè)置時(shí)間: 25µs
位數(shù): 16
數(shù)據(jù)接口: MICROWIRE?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 950mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm)裸露焊盤
供應(yīng)商設(shè)備封裝: 24-TSSOP 裸露焊盤
包裝: 管件
輸出數(shù)目和類型: 1 電流,單極;1 電流,雙極;1 電壓,單極;1 電壓,雙極
采樣率(每秒): 40k
產(chǎn)品目錄頁面: 782 (CN2011-ZH PDF)
Data Sheet
AD5412/AD5422
Rev. I | Page 21 of 44
CURRENT OUTPUT
–0.010
–0.008
–0.006
–0.004
–0.002
0
0.002
0.004
0
10,000
20,000
30,000
40,000
50,000
60,000
INL
E
RRO
R
(
%
F
S
R)
CODE
AVDD = 24V
AVSS = –24V/0V
TA = 25°C
RLOAD = 250
06
99
6-
10
6
EXTERNAL RSET
INTERNAL RSET
EXTERNAL RSET, BOOST TRANSISTOR
INTERNAL RSET, BOOST TRANSISTOR
Figure 44. Integral Nonlinearity vs. Code
–1.0
–0.8
–0.6
–0.2
–0.4
0
0.2
0.4
0.6
0.8
1.0
0
10,000
20,000
30,000
40,000
50,000
60,000
D
NL
E
R
RO
R
(
L
S
B)
CODE
06
99
6-
0
07
AVDD = 24V
AVSS = –24V/0V
TA = 25°C
RLOAD = 250
EXTERNAL RSET
INTERNAL RSET
EXTERNAL RSET, BOOST TRANSISTOR
INTERNAL RSET, BOOST TRANSISTOR
Figure 45. Differential Nonlinearity vs. Code
–0.15
–0.13
–0.11
–0.09
–0.07
–0.05
–0.03
0.01
0.05
–0.01
0.03
0
10,000
20,000
30,000
40,000
50,000
60,000
T
O
T
AL
UNAD
JU
S
T
E
D
E
RRO
R
(
%
F
S
R)
CODE
EXTERNAL RSET
INTERNAL RSET
EXTERNAL RSET, BOOST TRANSISTOR
INTERNAL RSET, BOOST TRANSISTOR
06
99
6-
0
08
AVDD = 24V
AVSS = –24V/0V
TA = 25°C
RLOAD = 250
Figure 46. Total Unadjusted Error vs. Code
–0.010
–0.008
–0.006
–0.004
0
–0.002
0.002
0.004
–40
–20
0
20
40
60
80
INL
E
RRO
R
(
%
F
S
R)
TEMPERATURE (°C)
0mA TO 24mA RANGE
AVDD = 24V
AVSS = –24V/0V
0
69
96
-00
9
Figure 47. Integral Nonlinearity vs. Temperature, Internal RSET
–0.003
–0.002
–0.001
0
0.002
0.001
0.003
–40
–20
0
20
40
60
80
IN
L
E
R
RO
R
(%
F
S
R)
TEMPERATURE (°C)
0mA TO 24mA RANGE
AVDD = 24V
AVSS = –24V/0V
0
69
96
-10
9
Figure 48. Integral Nonlinearity vs. Temperature, External RSET
–1.0
–0.8
–0.6
–0.4
0
–0.2
0.4
0.8
0.2
0.6
1.0
–40
–20
0
20
40
60
80
DNL
E
RRO
R
(
L
S
B)
TEMPERATURE (°C)
AVDD = 24V
AVSS = –24V/0V
ALL RANGES
INTERNAL AND EXTERNAL RSET
0
69
96
-01
0
Figure 49. Differential Nonlinearity vs. Temperature
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