參數(shù)資料
型號: AD5422BCPZ-REEL
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 32 us SETTLING TIME, 16-BIT DAC, QCC40
封裝: 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD-2, LFCSP-40
文件頁數(shù): 4/40頁
文件大小: 1323K
代理商: AD5422BCPZ-REEL
AD5412/AD5422
Rev. C | Page 12 of 40
Pin No.
Mnemonic
Description
TSSOP
LFCSP
16
23
DVCC
SELECT
When connected to GND, this pin disables the internal supply, and an external supply
must be connected to the DVCC pin. Leave this pin unconnected to enable the internal
supply. See the AD5412/AD5422 Features section.
17
24
CCOMP
Optional compensation capacitor connection for the voltage output buffer. Connecting
a 4 nF capacitor between this pin and the VOUT pin allows the voltage output to drive up
to 1 μF. It should be noted that the addition of this capacitor reduces the bandwidth of
the output amplifier, increasing the settling time.
19
26
IOUT
Current Output Pin.
20
27
BOOST
Optional External Transistor Connection. Connecting an external transistor reduces the
power dissipated in the AD5412/AD5422. See theAD5412/AD5422 Features section.
N/A
28, 29
CAP1, CAP2
Connection for Optional Output Filtering Capacitor. See the AD5412/AD5422 Features
section.
21
32
VOUT
Buffered Analog Output Voltage. The output amplifier is capable of directly driving a
1 kΩ, 2000 pF load.
22
33
+VSENSE
Sense connection for the positive voltage output load connection.
23
34
VSENSE
Sense connection for the negative voltage output load connection.
24
36
AVDD
Positive Analog Supply Pin. Voltage ranges from 10.8 V to 60 V.
25 (EPAD)
41 (EPAD)
Exposed
paddle
Negative Analog Supply Pin. Voltage ranges from –3 V to –24 V. This paddle can be
connected to 0 V if the output voltage range is unipolar. The paddle can be left
electrically unconnected provided that a supply connection is made at the AVSS pin. It is
recommended that the paddle be thermally connected to a copper plane for enhanced
thermal performance.
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