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參數(shù)資料
| 型號： | AD5405YCP-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | Dual 12-Bit, High Bandwidth, Multiplying DAC with 4-Quadrant Resistors and Parallel Interface |
| 中文描述： | PARALLEL, WORD INPUT LOADING, 0.015 us SETTLING TIME, 12-BIT DAC, QCC40 |
| 封裝： | 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD-2, LFCSP-40 |
| 文件頁數(shù)： | 13/24頁 |
| 文件大小： | 925K |
| 代理商： | AD5405YCP-REEL7 |
AD5405
TERMINOLOGY
Relative Accuracy
Relative accuracy or endpoint nonlinearity is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after
adjusting for zero and full scale and is normally expressed in
LSBs or as a percentage of full-scale reading.
Rev. 0 | Page 13 of 24
Differential Nonlinearity
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of ±1 LSB max over
the operating temperature range ensures monotonicity.
Gain Error
Gain error or full-scale error is a measure of the output error
between an ideal DAC and the actual device output. For this
DAC, ideal maximum output is V
REF
1 LSB. Gain error of the
DACs is adjustable to zero with external resistance.
Output Leakage Current
Output leakage current is current that flows in the DAC ladder
switches when these are turned off. For the I
OUT
1 terminal, it can
be measured by loading all 0s to the DAC and measuring the
I
OUT
1 current. Minimum current flows in the I
OUT
2 line when
the DAC is loaded with all 1s.
Output Capacitance
Capacitance from I
OUT
1 or I
OUT
2 to AGND.
Output Current Settling Time
This is the amount of time it takes for the output to settle to a
specified level for a full-scale input change. For this device, it is
specified with a 100 resistor to ground.
Digital to Analog Glitch lmpulse
The amount of charge injected from the digital inputs to the
analog output when the inputs change state. This is typically
specified as the area of the glitch in either pA-secs or nV-secs
depending upon whether the glitch is measured as a current or
voltage signal.
Digital Feedthrough
When the device is not selected, high frequency logic activity on
the device’ s digital inputs is capacitively coupled through the
device to show up as noise on the I
OUT
pins and subsequently
into the following circuitry. This noise is digital feedthrough.
Multiplying Feedthrough Error
This is the error due to capacitive feedthrough from the DAC
reference input to the DAC I
OUT
1 terminal, when all 0s are
loaded to the DAC.
Digital Crosstalk
This is the glitch impulse transferred to the outputs of one
DAC in response to a full-scale code change (all 0s to all 1s,
and vice versa) in the input register of the other DAC. It is
expressed in nV-s.
Analog Crosstalk
This is the glitch impulse transferred to the output of one DAC
due to a change in the output of another DAC. It is measured by
loading one of the input registers with a full-scale code change
(all 0s to all 1s, and vice versa), while keeping LDAC high. Then
pulse LDAC low and monitor the output of the DAC whose
digital code was not changed. The area of the glitch is expressed
in nV-s.
Channel to Channel Isolation
This refers to the proportion of input signal from one DAC’s
reference input which appears at the output of the other DAC,
and is expressed in dBs.
Total Harmonic Distortion (THD)
The DAC is driven by an ac reference. The ratio of the rms sum
of the harmonics of the DAC output to the fundamental value is
the THD. Usually only the lower-order harmonics are included,
such as the second to the fifth.
(
3
2
log
20
V
)
1
2
5
2
4
2
2
V
V
V
V
THD
+
+
+
=
Intermodulation Distortion
The DAC is driven by two combined sine wave references
of frequencies fa and fb. Distortion products are produced
at sum and difference frequencies of mfa ± nfb where m, n = 0,
1, 2, 3,... Intermodulation terms are those for which m or n is
not equal to zero. The second-order terms include (fa + fb)
and (fa fb) and the third-order terms are (2fa + fb), (2fa
fb),
(f + 2fa + 2fb) and (fa 2fb). IMD is defined as
(
amplitude
rms
)
l
fundamenta
the
of
products
distortion
diff
and
sum
the
of
sum
rms
IMD
log
20
=
Compliance Voltage Range
The maximum range of (output) terminal voltage for which the
device provides the specified characteristics.
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