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參數(shù)資料
型號: AD539JNZ
廠商: Analog Devices Inc
文件頁數(shù): 19/21頁
文件大小: 0K
描述: IC MULT/DIV DUAL CH LIN 16-DIP
標(biāo)準(zhǔn)包裝: 25
功能: 模擬乘法器/除法器
位元/級數(shù): 雙象限
封裝/外殼: 16-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 16-PDIP
包裝: 管件
AD539
Rev. B | Page 6 of 20
0
9679
-003
VX
HF COMP
VY1
+VS
W1
Z1
CHAN1 OUTPUT
BASE COMMON
–VS
VY2
INPUT COMMON
BASE COMMON
CHAN2 PUTPUT
Z2
OUTPUT COMMON
W2
AD539
TOP VIEW
(Not to Scale)
1
2
3
4
16
15
14
13
5
6
7
12
11
10
8
9
Figure 3. 16-Lead PDIP and SBDIP Pin Configurations (N-16, D-16)
Table 3. 16-Lead PDIP and SBDIP Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VX
Control Channel Input.
2
HF COMP
High Frequency Compensation.
3
VY1
Channel 1 Input.
4
+VS
Positive Supply Rail.
5
–VS
Negative Supply Rail.
6
VY2
Channel 2 Input.
7
INPUT COMMON
Internal Common Connection for the Input Amplifier Circuitry.
8
OUTPUT COMMON
Internal Common Connection for The Output Amplifier Circuitry.
9
W2
6 kΩ Feedback Resistor for Channel 2.
10
Z2
6 kΩ Feedback Resistor for Channel 2.
11
CHAN2 OUTPUT
Channel 2 Product of VX and VY2.
12
BASE COMMON
Increases Negative Output Compliance.
13
BASE COMMON
Increases Negative Output Compliance.
14
CHAN1 OUTPUT
Channel 1 Product of VX and VY1.
15
Z1
6 kΩ Feedback Resistor for Channel 1.
16
W1
6 kΩ Feedback Resistor for Channel 1.
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