參數(shù)資料
型號: AD5380BST-3
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: 40-Channel, 3V/5V Single Supply, 14-Bit, Voltage-Output DAC
中文描述: PARALLEL, WORD INPUT LOADING, 8 us SETTLING TIME, 14-BIT DAC, PQFP100
封裝: 14 X 14 MM, MS-026BED, LQFP-100
文件頁數(shù): 31/34頁
文件大小: 975K
代理商: AD5380BST-3
PRELIMINARY TECHNICAL DATA
REV. PrF 09/2003
AD5380
–31–
APPLICATIONS INFORMATION
AD5380 Monitor Function
The AD5380 contains a channel monitor function consisting of a multiplexer addressed via the interface allowing any
channel output to be routed to this pin for monitoring using an external ADC. In channel monitor mode Vout 39 be-
comes the MON_OUT pin, the pin to which all monitored signals are routed. The channel monitor function must be
enabled in the control register before any channels are routed to the MON_OUT pin. Table X contains the decoding
information required to route any channel to the MON_OUT pin. Selecting channel address 63 tristates the
MON_OUT pin. Figure 19 shows a typical monitoring circuit implemented using a 12-bit SAR ADC in a 6-lead sot
package. The controller output port selects the channel to be monitored and the input port reads the converted data from
the ADC.
AD5380
VOUT 39/MON_OUT
SCLK
SDATA
CS
AD7476
.
.
.
.
.
.
VOUT 0
VOUT 38
AVCC
VIN
AVCC
DAC_GND SIGNAL GND
AGND
DIN
SYNC
SCLK
CONTROLLER
INPUT PORT
OUTPUT PORT
GND
Figure 19. Typical Channel Monitoring Circuit
Toggle Mode Function
The toggle mode function allows an output signal to be generated using the
LDAC
control signal that switches between
two DAC data registers. This function is configured using the SFR control register as follows. A write with
REG1=REG0=0, A5-A0=001100 specifies a control register write. The toggle mode function is enabled in groups of 8-
channels using bits CR6 to CR2 in the control register. See AD5380 control register description. Figure 20 shows a
block diagram of the toggle mode implementation. Each of the 40 DAC channels on the AD5380 contain an A and a B
data register. Note, the “B” registers can only be loaded when Toggle mode is enabled. The sequence of events when
configuring the AD5380 for toggle mode of operation is as follows:
i) Enable Toggle Mode for the required channels via the Control Register
ii) Load Data to A registers
iii) Load Data to B registers.
iv) Apply
LDAC
.
The
LDAC
is used to switch between the “A” and “B” registers in determining the analog output. The first LDAC
configures the output to reflect the data in the “A” registers. This mode offers significant advantages if the user wants to
generate a square wave at the output of all 40 channels as might be required to drive a liquid crystal based variable opti-
cal attenuators. In this case the user writes to the control register and enables the toggle function by setting CR6 to
CR2=1 enabling the five groups of 8 for toggle mode operation. The user must then load data to all 40 “A” registers
and “B” registers. Toggling the
LDAC
will set the output values to reflect the data in the A and B registers and the
frequency of the
LDAC
will determine the frequency of the squarewave output.
Toggle mode is disabled via the control register, the first LDAC following the disabling of the toggle mode will update
the outputs with the data contained in the “A” registers.
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