參數(shù)資料
型號： AD5371BBCZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 24/29頁
文件大小： 0K
描述： IC DAC 14BIT 40CH SER 100-CSPBGA
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 1
設(shè)置時間： 20µs
位數(shù)： 14
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 40
電壓電源： 模擬和數(shù)字，雙 ±
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-LFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 100-CSBGA（10x10）
包裝： 標(biāo)準(zhǔn)包裝
輸出數(shù)目和類型： 40 電壓，單極；40 電壓，雙極
采樣率（每秒）： *
其它名稱： AD5371BBCZ-REELDKR
AD5371
Rev. B | Page 3 of 28
GENERAL DESCRIPTION
The AD53711 contains 40 14-bit DACs in a single 80-lead LQFP
or 100-ball CSP_BGA. The device provides buffered voltage
outputs with a span of 4× the reference voltage. The gain and
offset of each DAC can be independently trimmed to remove
errors. For even greater flexibility, the device is divided into five
groups of eight DACs. Three offset DACs allow the output range
of the groups to be adjusted. Group 0 can be adjusted by Offset
DAC 0, Group 1 can be adjusted by Offset DAC 1, and Group 2
to Group 4 can be adjusted by Offset DAC 2.
The AD5371 offers guaranteed operation over a wide supply
range, with VSS from 16.5 V to 4.5 V and VDD from 9 V to
16.5 V. The output amplifier headroom requirement is 1.4 V
operating with a load current of 1 mA.
1 Protected by U.S. Patent No. 5,969,657; other patents pending.
The AD5371 has a high speed serial interface that is compatible
with SPI, QSPI, MICROWIRE, and DSP interface standards
and can handle clock speeds of up to 50 MHz. It also has a
100 MHz low voltage differential signaling (LVDS) serial
interface.
The DAC registers are updated on reception of new data. All the
outputs can be updated simultaneously by taking the LDAC
input low. Each channel has a programmable gain and an offset
adjust register to allow removal of gain and offset errors.
Each DAC output is gained and buffered on chip with respect
to an external SIGGNDx input. The DAC outputs can also be
switched to SIGGNDx via the CLR pin.
Table 1. High Channel Count Bipolar DACs
Model
Resolution (Bits)
Nominal Output Span
Output Channels
Linearity Error (LSB)
16
4 × VREF (20 V)
16
±4
14
4 × VREF (20 V)
16
±1
16
4 × VREF (20 V)
8
±4
14
4 × VREF (20 V)
8
±1
16
4 × VREF (12 V)
40
±4
AD5371
14
4 × VREF (12 V)
40
±1
16
4 × VREF (12 V)
32
±4
14
4 × VREF (12 V)
32
±1
14
±8.75 V
32
±3
14
±8.75 V
40
±3
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD5371BSTZ 功能描述:IC DAC 14BIT 40CH SER 80-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:*
AD5371BSTZ-REEL 功能描述:IC DAC 14BIT 40CH SER 80-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:*
AD5372 制造商:AD 制造商全稱:Analog Devices 功能描述:32-Channel, 16/14, Serial Input, Voltage-Output DACs
AD5372BCPZ 制造商:Analog Devices 功能描述:DAC 32CH-CH RES-STRING 16BIT 56LFCSP EP - Trays
AD5372BCPZ-REEL7 制造商:Analog Devices 功能描述:DAC 32CH-CH RES-STRING 16BIT 56LFCSP EP - Tape and Reel
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