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參數(shù)資料
| 型號(hào)： | AD534TH |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Dual Channel 11-Bits, 125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs 64-VQFN -40 to 85 |
| 中文描述： | ANALOG MULTIPLIER OR DIVIDER, 1 MHz BAND WIDTH, MBCY10 |
| 封裝： | HERMETIC SEALED, METAL CAN, TO-100, 10 PIN |
| 文件頁數(shù)： | 3/20頁 |
| 文件大?。?/td> | 359K |
| 代理商： | AD534TH |
REV. 0
–3–
AD5330/AD5331/AD5340/AD5341
AC CHARACTERISTICS
1
B Version
3
Min
Parameter
2
Typ
Max
Unit
Conditions/Comments
Output Voltage Settling Time
AD5330
AD5331
AD5340
AD5341
Slew Rate
Major Code Transition Glitch Energy
Digital Feedthrough
Multiplying Bandwidth
Total Harmonic Distortion
V
REF
= 2 V. See Figure 20
1/4 Scale to 3/4 Scale Change (40 H to C0 H)
1/4 Scale to 3/4 Scale Change (100 H to 300 H)
1/4 Scale to 3/4 Scale Change (400 H to C00 H)
1/4 Scale to 3/4 Scale Change (400 H to C00 H)
6
7
8
8
0.7
6
0.5
200
–70
8
9
10
10
μ
s
μ
s
μ
s
μ
s
V/
μ
s
nV-s
nV-s
kHz
dB
1 LSB Change Around Major Carry
V
REF
= 2 V
±
0.1 V p-p. Unbuffered Mode
V
REF
= 2.5 V
±
0.1 V p-p. Frequency = 10 kHz
NOTES
1
Guaranteed by design and characterization, not production tested.
2
See Terminology section.
3
Temperature range: B Version: –40
°
C to +105
°
C; typical specifications are at 25
°
C.
Specifications subject to change without notice.
TIMING CHARACTERISTICS
1, 2, 3
Parameter
Limit at T
MIN
, T
MAX
0
0
20
5
4.5
5
5
4.5
5
4.5
20
20
50
Unit
Condition/Comments
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
t
13
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
CS
to
WR
Setup Time
CS
to
WR
Hold Time
WR
Pulsewidth
Data, GAIN, BUF, HBEN Setup Time
Data, GAIN, BUF, HBEN Hold Time
Synchronous Mode.
WR
Falling to
LDAC
Falling.
Synchronous Mode.
LDAC
Falling to
WR
Rising.
Synchronous Mode.
WR
Rising to
LDAC
Rising.
Asynchronous Mode.
LDAC
Rising to
WR
Rising.
Asynchronous Mode.
WR
Rising to
LDAC
Falling.
LDAC
Pulsewidth
CLR
Pulsewidth
Time Between
WR
Cycles
NOTES
1
Guaranteed by design and characterization, not production tested.
2
All input signals are specified with tr = tf = 5 ns (10% to 90% of V
DD
) and timed from a voltage level of (V
IL
+ V
IH
)/2.
3
See Figure 1.
CS
WR
DATA,
GAIN,
BUF,
HBEN
LDAC
1
LDAC
2
CLR
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
t
13
NOTES:
1
SYNCHRONOUS
LDAC
UPDATE MODE
2
ASYNCHRONOUS
LDAC
UPDATE MODE
Figure 1. Parallel Interface Timing Diagram
(V
DD
= 2.5 V to 5.5 V, All specifications T
MIN
to T
MAX
unless otherwise noted.)
(V
DD
= 2.5 V to 5.5 V. R
L
= 2 k to GND; C
L
= 200 pF to GND; all specifications T
MIN
to T
MAX
unless otherwise noted.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD5340 | 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs |
| AD5340BRU | 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs |
| AD5341 | 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs |
| AD5341BRU | 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs |
| AD5342 | 2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD534TH/883B | 功能描述:增效器/分頻器 MULTIPLIER IC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Multiplier 邏輯系列: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-14 |
| AD534TH883B | 制造商:AD 功能描述:NEW |
| AD53500 | 制造商:AD 制造商全稱:Analog Devices 功能描述:High Speed, High Current Capability Pin Driver |
| AD53500JRP | 制造商:AD 制造商全稱:Analog Devices 功能描述:High Speed, High Current Capability Pin Driver |
| AD53502JSTP | 制造商:Analog Devices 功能描述:Mid Performance DCL 制造商:Rochester Electronics LLC 功能描述:MID PERFORMANCE DCL - Bulk |
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