Table 1. VDD = 2.5 V to 5.5 V" />
參數(shù)資料
型號(hào): AD5346BRU
廠商: Analog Devices Inc
文件頁(yè)數(shù): 18/24頁(yè)
文件大?。?/td> 0K
描述: IC DAC 8BIT OCTAL VOUT 38-TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 50
設(shè)置時(shí)間: 6µs
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 8
電壓電源: 單電源
功率耗散(最大): 8.3mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 38-TFSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 38-TSSOP
包裝: 管件
輸出數(shù)目和類型: 8 電壓,單極;8 電壓,雙極
采樣率(每秒): 167k
AD5346/AD5347/AD5348
Rev. 0 | Page 3 of 24
SPECIFICATIONS
Table 1. VDD = 2.5 V to 5.5 V; VREF = 2 V; RL = 2 k to GND; CL = 200 pF to GND; all specifications TMIN to TMAX,
unless otherwise noted
B Version1
Min
Typ
Max
Unit
Conditions/Comments
DC PERFORMANCE3,4
AD5346
Resolution
8
Bits
Relative Accuracy
±0.15
±1
LSB
Differential Nonlinearity
±0.02
±0.25
LSB
Guaranteed monotonic by design over all codes
AD5347
Resolution
10
Bits
Relative Accuracy
±0.5
±4
LSB
Differential Nonlinearity
±0.05
±0.5
LSB
Guaranteed monotonic by design over all codes
AD5348
Resolution
12
Bits
Relative Accuracy
±2
±16
LSB
Differential Nonlinearity
±0.2
±1
LSB
Guaranteed monotonic by design over all codes
Offset Error
±0.4
±3
% of FSR
Gain Error
±0.1
±1
% of FSR
Lower Deadband5
10
60
mV
Lower deadband exists only if offset error is negative
Upper Deadband5
10
60
mV
VDD = 5 V; upper deadband exists only if VREF = VDD
Offset Error Drift6
–12
ppm of FSR/°C
Gain Error Drift6
–5
ppm of FSR/°C
DC Power Supply Rejection
Ratio6
–60
dB
VDD = ±10%
DC Crosstalk6
200
V
RL = 2 k to GND, 2 k to VDD; CL = 200 pF to GND;
Gain = +1
DAC REFERENCE INPUT6
VREF Input Range
1
VDD
V
Buffered reference mode
VREF Input Range
0.25
VDD
V
Unbuffered reference mode
VREF Input Impedance
>10
M
Buffered reference mode and power-down mode
90
k
Gain = +1; input impedance = RDAC
45
k
Gain = +2; input impedance = RDAC
Reference Feedthrough
–90
dB
Frequency = 10 kHz
Channel-to-Channel Isolation
–75
dB
Frequency = 10 kHz
OUTPUT CHARACTERISTICS6
Minimum Output Voltage4, 7
0.001
V min
Rail-to-rail operation
Maximum Output Voltage4, 7
VDD
0.001
V max
DC Output Impedance
0.5
Short Circuit Current
25
mA
VDD = 5 V
16
mA
VDD = 3 V
Power-Up Time
2.5
s
Coming out of power-down mode; VDD = 5 V
5
s
Coming out of power-down mode; VDD = 3 V
LOGIC INPUTS
Input Current
±1
A
VIL, Input Low Voltage
0.8
V
VDD = 5 V ±10%
0.7
V
VDD = 3 V ±10%
0.6
V
VDD = 2.5 V
VIH, Input High Voltage
1.7
V
VDD = 2.5 V to 5.5 V
Pin Capacitance
5
pF
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