參數(shù)資料
型號: AD532KDZ
廠商: Analog Devices Inc
文件頁數(shù): 6/17頁
文件大?。?/td> 0K
描述: IC MULTIPLIER 10V 14CDIP
標準包裝: 1
功能: 模擬乘法器/除法器
位元/級數(shù): 四象限
封裝/外殼: 14-CDIP(0.300",7.62mm)
供應商設備封裝: 14-CDIP SB
包裝: 管件
AD532
Rev. D | Page 13 of 16
Table 6. Adjustment Procedure (Divider or Square Rooter)
Divider
Square Rooter
With:
Adjust for:
With:
Adjust: for:
Adjust
X
Z
VOUT
Z
VOUT
Scale Factor
10 V
+10 V
10 V
+10 V
10 V
X0 (Offset)
1 V
+0.1 V
1 V
+0.1 V
1 V
Repeat if required.
SQUARE ROOT
AD532
20k
(X0)
47k
2.2k
10k
1k
(SF)
+VS
–VS
+VS
–VS
VOUT = 10VZ
Z
OUT
Z
VOUT
X1
X2
Y1
Y2
00502-
016
Figure 18. Square Rooter Connection
The connections for square root mode are shown in Figure 18.
Similar to the divide mode, the multiplier cell is connected in
the feedback of the op amp by connecting the output back to
both the X and Y inputs. The diode D1 is connected as shown to
prevent latch-up as ZIN approaches 0 volts. In this case, the VOS
adjustment is made with ZIN = +0.1 V dc, adjusting VOS to
obtain 1.0 V dc in the output, VOUT = √10 V Z. For optimum
performance, gain (S.F.) and offset (X0) adjustments are recom-
mended as shown and explained in Table 6.
DIFFERENCE OF SQUARES
AD532
20k
+VS
–VS
+VS
–VS
VOS
VOUT
X1
X2
Y1
Y2
Z
OUT
20k
10k
–Y
X
Y
(OPTIONAL)
VOUT =
X2 – Y2
10V
AD741KH
00502-
017
Figure 19. Differential of Squares Connection
The differential input capability of the AD532 allows for the
algebraic solution of several interesting functions, such as the
difference of squares, X2 Y2/10 V. As shown in Figure 19, the
AD532 is configured in the square mode, with a simple unity
gain inverter connected between one of the signal inputs (Y)
and one of the inverting input terminals (YIN) of the multiplier.
The inverter should use precision (0.1%) resistors or be otherwise
trimmed for unity gain for best accuracy.
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