參數(shù)資料
型號(hào)： AD5320BRT-REEL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 5/20頁(yè)
文件大?。?/td> 0K
描述： IC DAC 12BIT R-R W/BUFF SOT-23-6
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 10,000
設(shè)置時(shí)間： 8µs
位數(shù)： 12
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： SOT-23-6
供應(yīng)商設(shè)備封裝： SOT-23-6
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 1 電壓，雙極
采樣率（每秒）： 125k
AD5320
Rev. C | Page 13 of 20
POWER-DOWN MODES
The AD5320 contains four separate modes of operation. These
modes are software-programmable by setting two bits (DB13
and DB12) in the control register. Table 5 shows how the state
of the bits corresponds to the mode of operation of the device.
Table 5. Modes of Operation for the AD5320
DB13
DB12
Operating Mode
0
Normal Operation
Power-Down Modes
0
1
1 kΩ to GND
1
0
100 kΩ to GND
1
Three-State
When both bits are set to 0, the part works with its normal power
consumption of 140 μA at 5 V. However, for the three power-down
modes, the supply current falls to 200 nA at 5 V (50 nA at 3 V). Not
only does the supply current fall, but the output stage is also inter-
nally switched from the output of the amplifier to a resistor net-
work of known values. This has the advantage that the output
impedance of the part is known while the part is in power-down
mode. There are three different options: the output is connected
internally to GND through a 1 kΩ resistor, the output is connected
internally to GND through a 100 kΩ resistor, or it is left open-
circuited (three-state). The output stage is illustrated in Figure 27.
RESISTOR
STRING DAC
RESISTOR
NETWORK
POWER-DOWN
CIRCUITRY
VOUT
00
93
4-
02
6
AMPLIFIER
Figure 27. Output Stage During Power-Down
The bias generator, output amplifier, resistor string, and other
associated linear circuitry are shut down when the power-down
mode is activated. However, the contents of the DAC register
are unaffected when in power-down. The time to exit power-
down is typically 2.5 μs for VDD = 5 V and 5 μs for VDD = 3 V
(see Figure 21).
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