TA = 25°C V
參數(shù)資料
型號(hào): AD5320BRT-REEL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 2/20頁(yè)
文件大?。?/td> 0K
描述: IC DAC 12BIT R-R W/BUFF SOT-23-6
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 10,000
設(shè)置時(shí)間: 8µs
位數(shù): 12
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-6
供應(yīng)商設(shè)備封裝: SOT-23-6
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,雙極
采樣率(每秒): 125k
AD5320
Rev. C | Page 10 of 20
TA = 25°C
VDD = 5V
VLOGIC (V)
I DD
(A
)
800
600
400
200
0
05
4
3
2
1
00
93
4-
0
17
VDD = 3V
Figure 17. Supply Current vs. Logic Input Voltage
VOUT
CLK
CH1 1V, CH2 5V, TIME BASE = 1s/DIV
CH2
CH1
00
93
4-
0
18
VDD = 5V
FULL-SCALE CODE CHANGE
000 HEX – FFF HEX
TA = 25°C
OUTPUT LOADED WITH
2k AND 200pF TO GND
Figure 18. Full-Scale Settling Time
VOUT
CLK
CH1 1V, CH2 5V, TIME BASE = 1s/DIV
00
93
4-
01
9
CH1
CH2
VDD = 5V
HALF-SCALE CODE CHANGE
400 HEX – C00 HEX
TA = 25°C
OUTPUT LOADED WITH
2k AND 200pF TO GND
Figure 19. Half-Scale Settling Time
CH1
CH2
CH1 1V, CH 2 1V, TIME BASE = 20s/DIV
00
934
-02
0
2k LOAD TO VDD
VDD
VOUT
Figure 20. Power-On Reset to 0 V
CH1 1V, CH2 5V, TIME BASE = 5s/DIV
00
93
4-
0
21
CH2
CH1
CLK
VOUT
VDD = 5V
Figure 21. Exiting Power-Down (800 Hex Loaded)
LOADED WITH 2k
AND 200pF TO GND
CODE CHANGE:
800 HEX TO 7FF HEX
500ns/DIV
V
OU
T
(V
)
00
93
4-
0
22
2.54
2.52
2.50
2.48
2.46
2.56
Figure 22. Digital-to-Analog Glitch Impulse
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