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參數(shù)資料
| 型號： | AD5317BRUZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 10BIT QUAD W/BUFF 16TSSOP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 1 |
| 設置時間： | 7µs |
| 位數(shù)： | 10 |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 16-TSSOP |
| 包裝： | 標準包裝 |
| 輸出數(shù)目和類型： | 4 電壓，單極；4 電壓，雙極 |
| 采樣率（每秒）： | 143k |
| 其它名稱： | AD5317BRUZREEL7DKR |
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AD5307/AD5317/AD5327
Rev. C | Page 22 of 28
DAISY CHAINING
For systems that contain several DACs, or where the user
wishes to read back the DAC contents for diagnostic purposes,
the SDO pin can be used to daisy-chain several devices together
and provide serial readback. Figure 4 shows the timing diagram
for daisy-chain applications. The daisy-chain mode is enabled
by connecting DCEN high (see Figure 46).
1ADDITIONAL PINS OMITTED FOR CLARITY.
68HC111
MISO
DIN
SCLK
MOSI
SCK
PC7
PC6
SDO
SCLK
SDO
SCLK
SDO
DIN
AD53071
DCEN
SYNC
LDAC
AD53071
02
06
7-
0
46
Figure 46. AD5307 in Daisy-Chain Mode
POWER SUPPLY BYPASSING AND GROUNDING
In any circuit where accuracy is important, careful consideration
of the power supply and ground return layout helps to ensure
the rated performance. The printed circuit board on which the
AD5307/AD5317/AD5327 are mounted should be designed so
that the analog and digital sections are separated and confined
to certain areas of the board. If the AD5307/AD5317/AD5327
are in a system where multiple devices require an AGND-to-
DGND connection, the connection should be made at one
point only. The star ground point should be established as close
as possible to the device. The AD5307/AD5317/AD5327 should
have ample supply bypassing of 10 μF in parallel with 0.1 μF on
the supply located as close to the package as possible, ideally right
up against the device. The 10 μF capacitors are the tantalum bead
type. The 0.1 μF capacitor should have low effective series
resistance (ESR) and low effective series inductance (ESI), such
as is typical of the common ceramic types that provide a low
impedance path to ground at high frequencies to handle
transient currents due to internal logic switching.
The power supply lines of the AD5307/AD5317/AD5327 should
use as large a trace as possible to provide low impedance paths
and reduce the effects of glitches on the power supply line. Com-
ponents, such as clocks, with fast switching signals should be
shielded with digital ground to avoid radiating noise to other
parts of the board, and they should never be run near the refer-
ence inputs. Avoid crossover of digital and analog signals. Traces
on opposite sides of the board should run at right angles to each
other. This reduces the effects of feedthrough on the board. A
microstrip technique is by far the best, but it is not always
possible with a double-sided board. In this technique, the com-
ponent side of the board is dedicated to ground plane, and signal
traces are placed on the solder side.
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