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參數(shù)資料
| 型號： | AD5313 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Dual Rail-To-Rail,Voltage Output 10-Bit DACs(滿幅度電壓輸出雙10位D/A轉換器) |
| 中文描述： | 雙通道軌至軌電壓輸出10位DAC（滿幅度電壓輸出雙10位的D / A轉換器） |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 340K |
| 代理商： | AD5313 |
The references for the two DACs are derived from two reference
pins (one per DAC). These reference inputs may be configured
as buffered or unbuffered inputs depending on the state of the
BUF pins. The parts incorporate a power-on-reset circuit that
ensures that the DAC outputs power up to zero volts and remain
there until a valid write takes place to the device. There is also an
asynchronous active-low
CLR
pin which clears both DACs to
0V. The outputs of both DACs may be updated simultaneously
using the asynchronous
LDAC
input. The parts contain a power-
down feature which reduces the current consumption of the de-
vices to 200nA at 5V (50nA at 3V) and provides
software-selectable output loads while in power-down mode.
a
Prelim Technical Information
AD5303/13/23
FEATURES
AD5303: Two 8-Bit DACs in One Package
AD5313: Two 10-Bit DACs in One Package
AD5323: Two 12-Bit DACs in One Package
16-Pin TSSOP Package
Micro-Power Operation: 250
μ
A @ 5V (Including
Reference Current)
Power Down to 200nA@5V, 50nA@3V
+2.5V to +5.5V Power Supply
Double-Buffered Input Logic
Guaranteed Monotonic By Design
Buffered/Unbuffered Reference Input Options
Output Range: 0-Vref or 0-2Vref
Power-On-Reset to Zero Volts
SDO Daisy-Chaining Option
Simultaneous Update of DAC Outputs
Asynchronous CLR Facility
Low-Power Serial Interface with Schmitt-Triggered
Inputs
On-Chip Output Buffer Amplifiers with Rail-to-Rail
Operation
SYNC
Interrupt Facility
APPLICATIONS
Portable Battery Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators
GENERAL DESCRIPTION
The AD5303/13/23 are dual 8, 10 and 12-bit voltage out DACs
which operate from a single +2.5V to +5.5V supply. Their on-
chip precision output amplifiers allow rail-to-rail output swing to
be achieved. The AD5303/13/23 utilize a versatile 3-wire serial
interface which operates at clock rates up to 30MHz and is com-
patible with standard SPI, QSPI, MICROWIRE and DSP
interface standards.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
Both DACs may be powered down individually over the serial in-
terface. They may both be powered-down together using the ac-
tive-low
PD
pin.
The output ranges for either or both DACs can be set at 0-V
REF
or 0-2V
REF
depending on the Gain bit. The parts may also be
used in daisy-chaining applications using the SDO pin.
The four control bits in the 16-bit serial input word are used to
address the relevant DAC, to select the output range and to se-
lect the mode of operation (normal or any one of three power-
down modes).
The low power consumption of these parts in normal operation
make them ideally suited to portable battery-operated equip-
ment. The power consumption is 1.25mW at 5V reducing to
1μW in power-down mode.
The AD5303/13/23 are all available in a 16-pin TSSOP package.
PRODUCT HIGHLIGHTS
1. Low Power, Single supply operation. These parts operate
from a single +2.5V to +5.5V supply and consume 0.6 mW at
3V and 1.25 mW at 5V making them ideal for battery pow-
ered applications. Since the references may be buffered inter-
nally no external reference current is required and system
power consumption is reduced.
2. The on-chip output buffer amplifiers allow the outputs of the
DACs to swing rail-to-rail with a slew rate of 1V/μs.
3. Reference pins may be configured as buffered or
unbuffered.The unbuffered option allows the reference input
to be as high as V
DD
.
4. High speed serial interface with clock speeds up to 30MHz.
Designed for very low power consumption. The interface only
powers up during a write cycle.
5. Power down capability. When powered down the DACs con-
sume 50nA at 3V and 200nA at 5V.
6. Output range of 0-V
REF
or 0-2V
REF
.
7. Packaged in a 16-pin TSSOP package.
Prelim.D1 7/98
+2.5 V to +5.5 V, Dual Rail-To-Rail,
Voltage Output 8/10/12-Bit DACs
FUNCTIONAL BLOCK DIAGRAM
SPI
,
QSPI
are Trademarks of Motorola.
MICROWIRE
is a Trademark of National Semiconductor.
DAC
LATCH
DAC A
INPUT
LATCH
CONTROL
LOG IC
AD5303/13/23
VOUT A
VOUT B
DAC
LATCH
DAC B
INPUT
LATCH
GND
VDD
SYNC
CLK
SDIN
POWER-ON
RESET
LDAC
VREF B
BUF B
PD
DCEN
CLR
SDO
VRE F A
BUF A
相關PDF資料 |
PDF描述 |
|---|---|
| AD5314BRM | 2.5 V to 5.5 V, 500 uA, Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead microSOIC |
| AD5304 | 2.5 V to 5.5 V, 500 uA, Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead microSOIC |
| AD5304BRM | 2.5 V to 5.5 V, 500 uA, Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead microSOIC |
| AD5324BRM | 2.5 V to 5.5 V, 500 uA, Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead microSOIC |
| AD5314 | Dual Rail-To-Rail,Voltage Output 10-Bit DACs(滿幅度電壓輸出雙10位D/A轉換器) |
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| AD5313ARU-REEL7 | 制造商:Analog Devices 功能描述:DAC 2-CH Resistor-String 10-bit 16-Pin TSSOP T/R 制造商:Rochester Electronics LLC 功能描述:DUAL 10-BIT VOLTAGE OUT DAC I.C. - Tape and Reel |
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