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參數(shù)資料
| 型號： | AD5324BRM |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | DAC |
| 英文描述： | 2.5 V to 5.5 V, 500 uA, Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead microSOIC |
| 中文描述： | SERIAL INPUT LOADING, 8 us SETTLING TIME, 12-BIT DAC, PDSO10 |
| 封裝： | MO-187BA, MSOP-10 |
| 文件頁數(shù)： | 1/15頁 |
| 文件大?。?/td> | 226K |
| 代理商： | AD5324BRM |
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD5304/AD5314/AD5324
*
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2000
2.5 V to 5.5 V, 500 A, Quad Voltage Output
8-/10-/12-Bit DACs in 10-Lead microSOIC
FUNCTIONAL BLOCK DIAGRAM
RINPUT
V
OUT
A
BUFFER
REDAC
DAC A
V
DD
REFIN
GND
AD5304/AD5314/AD5324
RINPUT
V
OUT
B
BUFFER
REDAC
RINPUT
V
OUT
C
BUFFER
REDAC
RINPUT
V
OUT
D
BUFFER
REDAC
PRESET
SYNC
SCLK
DIN
INLOGIC
POLOGIC
LDAC
DAC B
DAC C
DAC D
FEATURES
AD5304
Four Buffered 8-Bit DACs in 10-Lead microSOIC
AD5314
Four Buffered 10-Bit DACs in 10-Lead microSOIC
AD5324
Four Buffered 12-Bit DACs in 10-Lead microSOIC
Low Power Operation: 500 A @ 3 V, 600 A @ 5 V
2.5 V to 5.5 V Power Supply
Guaranteed Monotonic By Design Over All Codes
Power-Down to 80 nA @ 3 V, 200 nA @ 5 V
Double-Buffered Input Logic
Output Range: 0–V
REF
Power-On-Reset to Zero Volts
Simultaneous Update of Outputs (
LDAC
Function)
Low Power, SPI, QSPI, MICROWIRE, and
DSP-Compatible 3-Wire Serial Interface
On-Chip Rail-to-Rail Output Buffer Amplifiers
Temperature Range –40 C to +105 C
APPLICATIONS
Portable Battery-Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators
Industrial Process Control
GENERAL DESCRIPTION
The AD5304/AD5314/AD5324 are quad 8-, 10- and 12-bit
buffered voltage output DACs in a 10-lead microSOIC package
that operate from a single 2.5 V to 5.5 V supply consuming
500
μ
A at 3 V. Their on-chip output amplifiers allow rail-to-
rail output swing to be achieved with a slew rate of 0.7 V/
μ
s.
A 3-wire serial interface is used which operates at clock rates
up to 30 MHz and is compatible with standard SPI, QSPI,
MICROWIRE and DSP interface standards.
The references for the four DACs are derived from one reference
pin. The outputs of all DACs may be updated simultaneously
using the software
LDAC
function. The parts incorporate a
power-on-reset circuit that ensures that the DAC outputs power
up to zero volts and remain there until a valid write takes place
to the device. The parts contain a power-down feature that
reduces the current consumption of the device to 200 nA @ 5 V
(80 nA @ 3 V).
The low power consumption of these parts in normal operation
makes them ideally suited to portable battery-operated equipment.
The power consumption is 3 mW at 5 V, 1.5 mW at 3 V, reducing
to 1
μ
W in power-down mode.
*
Protected by U.S. Patent No. 5,969,657; other patents pending.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corporation.
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| AD5320 | +2.7 V to +5.5 V, 140 uA, Rail-to-Rail Output 12-Bit DAC in a SOT-23 |
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