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| 型號： | AD5306BRUZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 19/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT QUAD W/BUFF 16-TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 96 |
| 設(shè)置時間： | 6µs |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 4.5mW |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 4 電壓，單極；4 電壓，雙極 |
| 采樣率（每秒）： | 167k |
| 產(chǎn)品目錄頁面： | 782 (CN2011-ZH PDF) |
AD5306/AD5316/AD5326
Rev. F | Page 4 of 24
A Version1
B Version1
Parameter2
Min
Typ
Max
Min
Typ
Max
Unit
Conditions/Comments
Short-Circuit Current
25
mA
VDD = 5 V.
16
mA
VDD = 3 V.
Power-Up Time
2.5
μs
Coming out of power-
down mode; VDD = 5 V.
5
μs
Coming out of power-
down mode; VDD = 3 V.
LOGIC INPUTS
(Excluding SCL, SDA)6
Input Current
±1
μA
VIL, Input Low Voltage
0.8
V
VDD = 5 V ± 10%.
0.6
V
VDD = 3 V ± 10%.
0.5
V
VDD = 2.5 V.
VIH, Input High Voltage
1.7
V
VDD = 2.5 V to 5.5 V;
TTL and 1.8 V CMOS
compatible.
Pin Capacitance
3
pF
LOGIC INPUTS (SCL, SDA)6
VIH, Input High Voltage
0.7 VDD
VDD + 0.3
0.7 VDD
VDD + 0.3
V
SMBus compatible at
VDD < 3.6 V.
VIL, Input Low Voltage
0.3
+0.3 VDD
0.3
+0.3 VDD
V
SMBus compatible at
VDD < 3.6 V.
IIN, Input Leakage Current
±1
μA
VHYST, Input Hysteresis
0.05 VDD
V
See Figure 20.
CIN, Input Capacitance
8
pF
Glitch Rejection
50
ns
Input filtering suppresses
noise spikes of less than
50 ns.
LOGIC OUTPUT (SDA)6
VOL, Output Low Voltage
0.4
V
ISINK = 3 mA.
0.6
V
ISINK = 6 mA.
Three-State Leakage Current
±1
μA
Three-State Output
Capacitance
8
pF
POWER REQUIREMENTS
VDD
2.5
5.5
2.5
5.5
V
VIH = VDD and VIL = GND;
interface inactive.
VDD = 4.5 V to 5.5 V
500
900
500
900
μA
All DACs in unbuffered
mode.
Buffered mode, extra
current is typically x mA
per DAC, where
x = 5 μA + VREF/RDAC.
VDD = 2.5 V to 3.6 V
400
750
400
750
μA
IDD (Power-Down Mode)
VIH = VDD and VIL = GND;
interface inactive.
VDD = 4.5 V to 5.5 V
0.3
1
0.3
1
μA
IDD = 3 μA (max) during
readback on SDA.
VDD = 2.5 V to 3.6 V
0.09
1
0.09
1
μA
IDD = 1.5 μA (max) during
readback on SDA.
1 Temperature range (A, B versions): 40°C to +105°C; typical at +25°C.
2 See the Terminology section.
3 DC specifications tested with the outputs unloaded.
4 Linearity is tested using a reduced code range: AD5306 (Code 8 to 255); AD5316 (Code 28 to 1023); AD5326 (Code 115 to 4095).
5 This corresponds to x codes. x = deadband voltage/LSB size.
6 Guaranteed by design and characterization; not production tested.
7 For the amplifier output to reach its minimum voltage, the offset error must be negative; for the amplifier output to reach its maximum voltage, VREF = VDD,
the offset plus gain error must be positive.
8 Interface inactive; all DACs active. DAC outputs unloaded.
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| AD5306BRUZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2.5 V to 5.5 V, 400 ??A, 2-Wire Interface, Quad Voltage Output, 8-/10-/12-Bit DACs |
| AD5306BRUZ-REEL | 功能描述:IC DAC 8BIT QUAD W/BUFF 16-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標(biāo)準(zhǔn)包裝:91 系列:- 設(shè)置時間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
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