I DD ( μA) 3.5 4.0 2.5 3.0 4.5 5." />
參數(shù)資料
型號: AD5306BRUZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 5/24頁
文件大小: 0K
描述: IC DAC 8BIT QUAD W/BUFF 16-TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1,000
設(shè)置時間: 6µs
位數(shù): 8
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 單電源
功率耗散(最大): 4.5mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電壓,單極;4 電壓,雙極
采樣率(每秒): 167k
AD5306/AD5316/AD5326
Rev. F | Page 13 of 24
0
100
200
300
400
500
600
I DD
(
μA)
3.5
4.0
2.5
3.0
4.5
5.0
5.5
VDD (V)
+25
°C
–40°C
02066-018
+105
°C
Figure 18. Supply Current vs. Supply Voltage
0
0.1
0.2
0.3
0.4
0.5
I DD
(
μA)
3.5
4.0
2.5
3.0
4.5
5.0
5.5
VDD (V)
+25
°C
–40
°C
+105
°C
02066-019
Figure 19. Power-Down Current vs. Supply Voltage
0
50
100
150
200
250
I DD
(
μA)
300
350
400
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
VLOGIC (V)
TA = 25°C
VDD = 5V
VDD = 3V
DECREASING
INCREASING
DECREASING
02066-020
Figure 20. Supply Current vs. Logic Input Voltage
for SDA and SCL Voltage Increasing and Decreasing
TA = 25°C
VDD = 5V
VREF = 5V
VOUTA
SCL
CH1
CH1 1V, CH2 5V, TIME BASE = 1
μs/DIV
CH2
02066-021
Figure 21. Half-Scale Settling (1/4 to 3/4 Scale Code Change)
TA = 25°C
VDD = 5V
VREF = 2V
VOUTA
VDD
CH1
CH2
CH1 2V, CH2 200mV, TIME BASE = 200
μs/DIV
02066-022
Figure 22. Power-On Reset to 0 V
TA = 25°C
VDD = 5V
VREF = 2V
VOUTA
PD
CH1
CH1 500mV, CH2 5V, TIME BASE = 1
μs/DIV
CH2
02066-023
Figure 23. Exiting Power-Down to Midscale
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