參數(shù)資料
型號: AD5304ARMZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 19/24頁
文件大?。?/td> 0K
描述: IC DAC 8BIT QUAD VOUT 10MSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
設(shè)置時(shí)間: 6µs
位數(shù): 8
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 單電源
功率耗散(最大): 4.5W
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 標(biāo)準(zhǔn)包裝
輸出數(shù)目和類型: 4 電壓,單極;4 電壓,雙極
采樣率(每秒): 167k
產(chǎn)品目錄頁面: 782 (CN2011-ZH PDF)
其它名稱: AD5304ARMZ-REEL7DKR
AD5304/AD5314/AD5324
Data Sheet
Rev. H | Page 4 of 24
Parameter1
A, W Version2
B Version2
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions/Comments
LOGIC INPUTS5
Input Current
±1
μA
VIL, Input Low Voltage
0.8
V
VDD = 5 V ± 10%
0.6
V
VDD = 3 V ± 10%
0.5
V
VDD = 2.5 V
VIH, Input High Voltage
2.4
V
VDD = 5 V ± 10%
2.1
V
VDD = 3 V ± 10%
2.0
V
VDD = 2.5 V
Pin Capacitance
3
pF
POWER REQUIREMENTS
VDD
2.5
5.5
2.5
5.5
V
IDD (Normal Mode)7
VDD = 4.5 V to 5.5 V
600
900
600
900
μA
VIH = VDD and VIL = GND
VDD = 2.5 V to 3.6 V
500
700
500
700
μA
VIH = VDD and VIL = GND
IDD (Power-Down Mode)
VDD = 4.5 V to 5.5 V
0.2
1
0.2
1
μA
VIH = VDD and VIL = GND
VDD = 2.5 V to 3.6 V
0.08
1
0.08
1
μA
VIH = VDD and VIL = GND
1 See the Terminology section.
2 Temperature range (A, B, W Version): 40°C to +105°C; typical at +25°C.
3 DC specifications tested with the outputs unloaded.
4 Linearity is tested using a reduced code range: AD5304 (Code 8 to Code 248); AD5314 (Code 28 to Code 995); AD5324 (Code 115 to Code 3981).
5 Guaranteed by design and characterization, not production tested.
6 For the amplifier output to reach its minimum voltage, offset error must be negative. For the amplifier output to reach its maximum voltage, VREF = VDD and offset plus
gain error must be positive.
7 IDD specification is valid for all DAC codes; interface inactive; all DACs active; load currents excluded.
AC CHARACTERISTICS
VDD = 2.5 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; all specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter1, 2
A, B, W Version3
Min
Typ
Max
Unit
Test Conditions/Comments
Output Voltage Settling Time
VREF = VDD = 5 V
AD5304
6
8
μ
s
scale to scale change (0x40 to 0xC0)
AD5314
7
9
μ
s
scale to scale change (0x100 to 0x300)
AD5324
8
10
μ
s
scale to scale change (0x400 to 0xC00)
Slew Rate
0.7
V/μs
Major-Code Transition Glitch Energy
12
nV-sec
1 LSB change around major carry
Digital Feedthrough
1
nV-sec
Digital Crosstalk
1
nV-sec
DAC-to-DAC Crosstalk
3
nV-sec
Multiplying Bandwidth
200
kHz
VREF = 2 V ± 0.1 V p-p
Total Harmonic Distortion
–70
dB
VREF = 2.5 V ± 0.1 V p-p; frequency = 10 kHz
1 See the Terminology section.
2 Guaranteed by design and characterization, not production tested.
3 Temperature range (A, B, W Version): 40°C to +105°C; typical at +25°C.
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