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參數(shù)資料
| 型號： | AD5271BCPZ-100-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RHEOSTAT 5V 50-TP 256 10MSOP |
| 標準包裝： | 1 |
| 接片： | 256 |
| 電阻（歐姆）： | 100k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標準值 5 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | 4 線串行 |
| 電源電壓： | 2.7 V ~ 5.5 V，±2.5 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 10-MSOP |
| 包裝： | 標準包裝 |
| 其它名稱： | AD5271BCPZ-100-RL7DKR |
AD5270/AD5271
Data Sheet
Rev. F | Page 20 of 24
SHUT-DOWN MODE
The AD5270/AD5271 can be shut down by executing the
software shutdown command, Command 9 (see Table 11), and
setting the LSB to 1. This feature places the RDAC in a zero-
power-consumption state where Terminal Ax is open circuited
and the Wiper Terminal Wx remains connected. It is possible to
execute any command from Table 11 while the AD5270/AD5271
are in shutdown mode. The parts can be taken out of shutdown
mode by executing Command 9 and setting the LSB to 0 or by a
software reset, Command 4 (see Table 11).
RESISTOR PERFORMANCE MODE
This mode activates a new, patented 1% end-to-end resistor
tolerance that ensures a ±1% resistor tolerance error on each
resistor tolerance. The resistor performance mode is activated by
programming Bit C2 of the control register.
RESET
The AD5270/AD5271 can be reset through software by executing
Command 4 (see Table 11). The reset command loads the
RDAC register with the contents of the most recently programmed
50-TP memory location. The RDAC register loads with
midscale if no 50-TP memory location has been previously
programmed.
Table 12. Write and Read to RDAC and 50-TP Memory
DIN
SDO1
Action
0x1C03
0xXXXX
Enable update of the wiper position and the 50-TP memory contents through the digital interface.
0x0500
0x1C03
Write 0x100 to the RDAC register; wiper moves to full-scale position.
0x0800
0x0500
Prepares data read from RDAC register.
0x0C00
0x100
Stores RDAC register content into the 50-TP memory. A 16-bit word appears out of SDO, where the last 10-bits contain
the contents of the RDAC register (0x100).
0x1800
0x0C00
Prepares data read of last programmed 50-TP memory monitor location.
0x0000
0xXX19
NOP Instruction 0 sends a 16-bit word out of SDO, where the six LSBs last six bits contain the binary address of the last
programmed 50-TP memory location, for example, 0x19 (see Table 13).
0x1419
0x0000
Prepares data read from Memory Location 0x19.
0x2000
0x0100
Prepares data read from the control register. Sends a 16-bit word out of SDO, where the last 10-bits contain the
contents of Memory Location 0x19.
0x0000
0xXXXX
NOP Instruction 0 sends a 16-bit word out of SDO, where the last four bits contain the contents of the control register.
If Bit C3 = 1, the fuse program command successful.
1
X is don’t care.
Table 13. Control Register Bit Map
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
0
C3
C2
C1
C0
Table 14. Control Register Bit Description
Bit Name
Description
C0
50-TP program enable
0 = 50-TP program disabled (default)
1 = enable device for 50-TP program
C1
RDAC register write protect
0 = wiper position frozen to value in 50-TP memory (default)1
1 = allow update of wiper position through digital interface
C2
R-performance enable
0 = RDAC resistor tolerance calibration enabled (default)
1 = RDAC resistor tolerance calibration disabled
C3
50-TP memory program success bit
0 = fuse program command unsuccessful (default)
1 = fuse program command successful
1
Wiper position frozen to the last value programmed in the 50-TP memory. The wiper is frozen to midscale if the 50-TP memory has not been previously programmed.
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