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REV. A
–5–
AD5241/AD5242
AD5242 PIN FUNCTION DESCRIPTIONS
Pin
Mnemonic
Description
1
2
3
4
5
O
1
A
1
W
1
B
1
V
DD
Logic Output Terminal O
1
Resistor Terminal A
1
Wiper Terminal W
1
Resistor Terminal B
1
Positive power supply, specified for opera-
tion from 2.2 V to 5.5 V.
Active low, asynchronous connection of
the Wiper W to Terminal B, and open
circuit of Terminal A. RDAC register
contents unchanged.
SHDN
should tie to
V
DD
if not used.
Serial Clock Input
Serial Data Input/Output
Programmable address bit for multiple
package decoding. Bits AD0 and AD1
provide four possible addresses.
Programmable address bit for multiple
package decoding. Bits AD0 and AD1
provide four possible addresses.
Common Ground
Negative power supply, specified for
operation from 0 V to –2.7 V.
Logic Output Terminal O
2
Resistor Terminal B
2
Wiper Terminal W
2
Resistor Terminal A
2
6
SHDN
7
8
9
SCL
SDA
AD0
10
AD1
11
12
DGND
V
SS
13
14
15
16
O
2
B
2
W
2
A
2
AD5241 PIN CONFIGURATION
TOP VIEW
(Not to Scale)
14
13
12
11
10
9
8
1
2
3
4
5
6
7
NC = NO CONNECT
W
1
B
1
V
DD
SHDN
SCL
SDA
O
1
NC
O
2
V
SS
DGND
AD1
AD0
A
1
AD5241
AD5242 PIN CONFIGURATION
(TOP VIEW
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
O
1
A
1
W
1
B
1
V
DD
SHDN
SCL
SDA
A
2
W
2
B
2
O
2
V
SS
DGND
AD1
AD0
AD5242
AD5241 PIN FUNCTION DESCRIPTIONS
Pin
Mnemonic
Description
1
2
3
4
A
1
W
1
B
1
V
DD
Resistor Terminal A
1
Wiper Terminal W
1
Resistor Terminal B
1
Positive power supply, specified for opera-
tion from 2.2 V to 5.5 V.
Active low, asynchronous connection of
the Wiper W to Terminal B, and open
circuit of Terminal A. RDAC register
contents unchanged.
SHDN
should tie to
V
DD
if not used.
Serial Clock Input
Serial Data Input/Output
Programmable address bit for multiple
package decoding. Bits AD0 and AD1
provide four possible addresses.
Programmable address bit for multiple
package decoding. Bits AD0 and AD1
provide four possible addresses.
Common Ground
Negative power supply, specified for
operation from 0 V to –2.7 V.
Logic Output Terminal O
2
No Connect
Logic Output Terminal O
1
5
SHDN
6
7
8
SCL
SDA
AD0
9
AD1
10
11
DGND
V
SS
12
13
14
O
2
NC
O
1