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REV. A
AD5241/AD5242
–4–
ABSOLUTE MAXIMUM RATINGS
*
(T
A
= 25
°
C, unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 , +7 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V , –7 V
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
V
A
, V
B
, V
W
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
, V
DD
A
X
–B
X
, A
X
–W
X
, B
X
–W
X
at 10 k
in TSSOP-14 . . .
±
5.0 mA
*
A
X
–B
X
, A
X
–W
X
, B
X
–W
X
at 100 k
in TSSOP-14 . .
±
1.5 mA
*
A
X
–B
X
, A
X
–W
X
, B
X
–W
X
at 1 M
in TSSOP-14 . . .
±
0.5 mA
*
Digital Input Voltage to GND . . . . . . . . . . . . . . . . . . 0 V, 7 V
Operating Temperature Range . . . . . . . . . . . –40
°
C to +85
°
C
Thermal Resistance
θ
JA
SOIC (SO-14) . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
°
C/W
SOIC (SO-16) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
°
C/W
TSSOP-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
°
C/W
TSSOP-16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
°
C/W
Maximum Junction Temperature (T
J
max) . . . . . . . . . . 150
°
C
Package Power Dissipation P
D
= (T
J
max – T
A
)/
θ
JA
Storage Temperature . . . . . . . . . . . . . . . . . . –65
°
C to +150
°
C
Lead Temperatures
R-14, R-16, RU-14, RU-16 (Vapor Phase, 60 sec) . . 215
°
C
R-14, R-16, RU-14, RU-16 (Infrared, 15 sec) . . . . . . 220
°
C
*
Max Current increases at lower resistance and different packages.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD5241/AD5242 features proprietary ESD protection circuitry, permanent damage may occur
on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
Number of
Channels
End to End
R
AB
( )
10 k
10 k
10 k
100 k
100 k
100 k
1 M
1 M
1 M
10 k
10 k
10 k
100 k
100 k
100 k
1 M
1 M
1 M
Temperature
Range ( C)
Package
Description
Package
Option
#Devices per
Container
Model
AD5241BR10
AD5241BR10-REEL7
AD5241BRU10-REEL7
AD5241BR100
AD5241BR100-REEL7
AD5241BRU100-REEL7
AD5241BR1M
AD5241BR1M-REEL7
AD5241BRU1M-REEL7
AD5242BR10
AD5242BR10-REEL7
AD5242BRU10-REEL7
AD5242BR100
AD5242BR100-REEL7
AD5242BRU100-REEL7
AD5242BR1M
AD5242BR1M-REEL7
AD5242BRU1M-REEL7
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
–40 to +85
SO-14
SO-14
TSSOP-14
SO-14
SO-14
TSSOP-14
SO-14
SO-14
TSSOP-14
SO-16
SO-16
TSSOP-16
SO-16
SO-16
TSSOP-16
SO-16
SO-16
TSSOP-16
R-14
R-14
RU-14
R-14
R-14
RU-14
R-14
R-14
RU-14
R-16A
R-16A
RU-16
R-16A
R-16A
RU-16
R-16A
R-16A
RU-16
56
1000
1000
56
1000
1000
56
1000
1000
48
1000
1000
48
1000
1000
48
1000
1000
NOTES
1. The AD5241/AD5242 die size is 69 mil
×
78 mil, 5,382 sq. mil. Contains 386 transistors for each channel. Patent Number 5495245 applies.
2. TSSOP packaged units are only available in 1,000-piece quantity Tape and Reel.