參數(shù)資料
型號: AD5162BRM50-RL7
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字電位計
英文描述: Dual 256-Position SPI Digital Potentiometer
中文描述: DUAL 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO10
封裝: 3 X 4.90 MM, MO-187BA, MSOP-10
文件頁數(shù): 13/20頁
文件大小: 960K
代理商: AD5162BRM50-RL7
AD5162
THEORY OF OPERATION
The AD5162 is a 256-position digitally controlled variable
resistor (VR) device.
Rev. A | Page 13 of 20
An internal power-on preset places the wiper at midscale
during power-on, which simplifies the fault condition recovery
at power-up.
PROGRAMMING THE VARIABLE RESISTOR AND
VOLTAGE
Rheostat Operation
The nominal resistance of the RDAC between terminals A and
B is available in 2.5 k, 10 k, 50 k, and 100 k. The nominal
resistance (R
AB
) of the VR has 256 contact points accessed by
the wiper terminal, plus the B terminal contact. The 8-bit data
in the RDAC latch is decoded to select one of the 256 possible
settings.
A
W
B
A
W
B
A
W
B
0
Figure 33. Rheostat Mode Configuration
Assuming that a 10 k part is used, the wiper’s first connection
starts at the B terminal for data 0x00. Because there is a 50
wiper contact resistance, such a connection yields a minimum
of 100 (2 × 50 ) resistance between terminals W and B. The
second connection is the first tap point, which corresponds to
139 (R
WB
= R
AB
/256 + 2 × R
W
= 39 + 2 × 50 ) for data
0x01. The third connection is the next tap point, representing
178 (2 × 39 + 2 × 50 ) for data 0x02, and so on. Each LSB
data value increase moves the wiper up the resistor ladder until
the last tap point is reached at 10,100 (R
AB
+ 2 × R
W
).
D4
D3
D2
D1
D0
D7
D5
RDAC
LATCH
AND
DECODER
R
S
R
S
R
S
R
S
A
W
B
0
Figure 34. AD5162 Equivalent RDAC Circuit
The general equation determining the digitally programmed
output resistance between W and B is
W
AB
WB
R
R
D
D
R
×
+
×
=
2
256
)
(
(1)
where:
D
is the decimal equivalent of the binary code loaded in the
8-bit RDAC register.
R
AB
is the end-to-end resistance.
R
W
is the wiper resistance contributed by the ON resistance of
the internal switch.
In summary, if R
AB
= 10 k and the A terminal is open
circuited, the following output resistance R
WB
is set for the
indicated RDAC latch codes.
Table 6. Codes and Corresponding R
WB
Resistance
D (Dec)
R
WB
()
Output State
255
9,961
Full scale (R
AB
1 LSB + R
W
)
128
5,060
Midscale
1
139
1 LSB
0
100
Zero scale (wiper contact resistance)
Note that, in the zero-scale condition, a finite wiper resistance
of 100 is present. Care should be taken to limit the current
flow between W and B in this state to a maximum pulse current
of no more than 20 mA. Otherwise, degradation or possible
destruction of the internal switch contact can occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between the wiper W and terminal A also produces a
digitally controlled complementary resistance R
WA
. When these
terminals are used, the B terminal can be opened. Setting the
resistance value for R
WA
starts at a maximum value of resistance
and decreases as the data loaded in the latch increases in value.
The general equation for this operation is
W
AB
WA
R
R
D
D
R
×
+
×
=
2
256
256
)
(
(2)
For R
AB
= 10 k and the B terminal open circuited, the
following output resistance R
WA
is set for the indicated RDAC
latch codes.
Table 7. Codes and Corresponding R
WA
Resistance
D (Dec)
R
WA
()
Output State
255
139
Full scale
128
5,060
Midscale
1
9,961
1 LSB
0
10,060
Zero scale
Typical device-to-device matching is process lot dependent and
may vary by up to ±30%. Because the resistance element is
processed in thin film technology, the change in R
AB
with
temperature has a very low 35 ppm/°C temperature coefficient.
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