參數(shù)資料
型號(hào): AD2S82ALP
廠商: ANALOG DEVICES INC
元件分類: 位置變換器
英文描述: Variable Resolution, Monolithic Resolver-to-Digital Converters
中文描述: SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, PQCC44
封裝: PLASTIC, LCC-44
文件頁(yè)數(shù): 15/16頁(yè)
文件大?。?/td> 207K
代理商: AD2S82ALP
AD2S81A/AD2S82A
REV. B
–15–
For more information on resistive scaling of SIN, COS and
REFERENCE converter inputs, refer to the application note
“Circuit Applications of the 2S81 and 2S80 Resolver-to-Digital
Converters.”
APPLICATIONS
Control Transformer
The ratio multiplier of the AD2S82A can be used independently
of the loop integrators as a
control transformer
. In this mode the
resolver inputs
θ
are multiplied by a digital angle
φ
, any differ-
ence between and
φ
and
θ
will be represented by the AC ERROR
output as SIN
ω
t
sin (
θ
φ
) or the DEMOD output as sin (
θ
φ
).
To use the AD2S81A/AD2S82A in this mode refer to the
“Control Transformer” application note.
Dynamic Switching
In applications where the user requires wide band response from
the converter, for example 100 rpm to 6000 rpm, superior per-
formance is achieved if the converters control characteristics are
switched dynamically. This reduces velocity offset levels at low
tracking rates. For more information on the technique refer to
“Dynamic Resolution Switching Using the Variable Resolution
Monolithic Resolver-to-Digital Converters.”
OTHER PRODUCTS
The AD2S80A is a monolithic resolver-to-digital converter
offering 10–16 bits of resolution and user selectable dynamics.
The AD2S80A is also available in 40-lead ceramic DIP, 44-lead
LCC and is qualified to MIL-STD 883B Rev C.
The AD2S46 is a highly integrated hybrid resolver/synchro to
digital converter packaged in a 28-lead ceramic DIP. The part
offers the user 1.3 arc minutes of accuracy over the full military
temperature range.
The AD2S34 is a dual channel 14-bit hybrid resolver-to-digital
converter packaged in a 1 in
2
32-lead flatpack.
The 1740/41/42 are hybrid resolver/synchro to digital converters
which incorporate pico-transformer isolated input signal
conditioning.
TYPICAL CIRCUIT CONFIGURATION
Figure 11 shows a typical circuit configuration for the AD2S81A/
AD2S82A in a 12-bit resolution mode. Values of the external
components have been chosen for a reference frequency of 5 kHz
and a maximum tracking rate of 260 rps with a bandwidth of
520 Hz. Placing the values for R4, R6, C4 and C5 in the equa-
tion for K
A
gives a value of 2.7
×
10
6
. The resistors are 0.125 W,
5% tolerance preferred values. The capacitors are 100 V ceramic,
10% tolerance components.
For signal and reference voltages greater than 2 V rms a simple
voltage divider circuit of resistors can be used to generate the
correct signal level at the converter. Care should be taken to
ensure that the ratios of the resistors between the sine signal line
and ground and the cosine signal line and ground are the same.
Any difference will result in an additional position error.
TIME – ms
360
00
24
4
A
8
12
16
20
315
180
135
90
45
270
225
Figure 12. Large Step Response Curves for Typical Circuit
Shown in Figure 11
RIPPLE CLK
DIRECTION
BUSY
DATA LOAD
BYTE SELECT
ENABLE
–12V
MSB
LSB
0V
VELOCITY
O/P
+5V
15k
V
22nF
PIN 1
18 19 20 21 22 23 24 25 26 27 28
6
5
4
3
2
1
44 43 42 41 40
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
AD2S82A
TOP VIEW
(Not to scale)
COS HIGH
REF LOW
COS LOW
SIN LOW
COMPLEMENT
SC2
15k
V
22nF
100k
V
100nF
100nF
+12V
SIN HIGH
REFERENCE
INPUT
68
V
470pF
39k
V
110k
V
180k
V
1.5nF
6.8nF
100nF
4.7M
V
1M
V
INHIBIT
DATA OUTPUT
RESOLVER
SIGNAL
DATA
OUTPUT
Figure 11. Typical Circuit Configuration
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