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參數資料
| 型號： | AD2S1200YSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 10/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONV R/D 12-BIT W/OSC 44-LQFP |
| 標準包裝： | 1 |
| 類型： | R/D 轉換器 |
| 分辨率（位）： | 12 b |
| 數據接口： | 串行，并聯 |
| 電壓電源： | 模擬和數字 |
| 電源電壓： | 5V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LQFP |
| 供應商設備封裝： | 44-LQFP（7x7） |
| 包裝： | 托盤 |
| 產品目錄頁面： | 790 (CN2011-ZH PDF) |
| 配用： | EVAL-AD2S1200CBZ-ND - BOARD EVAL FOR AD2S1200 |
AD2S1200
Rev. 0 | Page 18 of 24
CIRCUIT DYNAMICS
AD2S1200 LOOP RESPONSE MODEL
04406-0-011
ERROR
(ACCELERATION)
–
θIN
θOUT
VELOCITY
k1
× k2
1–z –1
1–bz –1
1–z –1
c1–az –1
c
Sin/Cos LOOKUP
Figure 11. RDC System Response Block Diagram
The RDC is a mixed-signal device, which uses two A/D
converters to digitize signals from the resolver and a Type II
tracking loop to convert these to digital position and velocity
words.
The first gain stage consists of the ADC gain on the Sin/Cos
inputs, and the gain of the error signal into the first integrator.
The first integrator generates a signal proportional to velocity.
The compensation filter contains a pole and a zero, used to
provide phase margin and reduce high frequency noise gain.
The second integrator is the same as the first integrator and
generates the output position from the velocity signal. The
Sin/Cos lookup has unity gain. Values are given below for each
section:
ADC gain parameter
(k1nom = 1.8/2.5)
)
(
)
(
1
V
k
REF
p
IN
=
Error gain parameter
π
×
=
2
10
18
2
6
x
k
Compensator zero coefficient
4096
4095
=
a
Compensator pole coefficient
4096
4085
=
b
Integrator gain parameter
4096000
1
=
c
INT1 and INT2 transfer function
1
)
(
=
z
c
z
I
Compensation filter transfer
function
1
)
(
=
bz
az
z
C
R2D open-loop transfer function
)
(
)
(
2
1
)
(
2
z
C
z
I
k
z
G
×
=
R2D closed-loop transfer function
)
(
1
)
(
)
(
z
G
z
G
z
H
+
=
The closed-loop magnitude and phase responses are that of a
second-order low-pass filter (see Figure 12 and Figure 13).
To convert G(z) into the s-plane, we perform an inverse bilinear
transformation by substituting for z, where T = the sampling
period (1/4.096 MHz ≈ 244 ns).
s
T
s
T
z
+
=
2
Substitution yields the open-loop transfer function G(s).
)
1
(
2
)
1
(
1
)
1
(
2
)
1
(
1
4
1
)
1
(
2
1
)
(
2
b
T
s
a
T
s
T
s
sT
b
a
k
s
G
+
×
+
+
×
+
×
+
×
×
=
This transformation produces the best matching at low
frequencies (f << fSAMPLE). At lower frequencies (within the
closed-loop bandwidth of the AD2S1200), the transfer function
can be simplified to
2
1
2
1
)
(
st
s
K
s
G
a
+
×
where:
b
a
k
K
b
T
t
a
T
t
a
×
=
+
=
+
=
)
1
(
2
1
)
1
(
2
)
1
(
)
1
(
2
)
1
(
2
1
Solving for each value gives t1 = 1 s, t2 = 90 s, and Ka ≈ 7.4 ×
106 s
-2. Note that the closed-loop response is described as
)
(
1
)
(
)
(
s
G
s
G
s
H
+
=
By converting to the s-domain, we are able to quantify the
open-loop dc gain (Ka). This value is useful during calculation
of acceleration error of the loop as discussed in the Sources of
Error section.
The step response to a 10° input step is shown in Figure 14.
Because the error calculation (Equation 3) is nonlinear for large
values of θ , the response time for larger step changes in
position (90°–180°) will typically take three times as long as the
response to a small step change in position (<20°). In response
to a step change in velocity, the AD2S1200 will exhibit the same
response characteristics as for a step change in position.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD2S1200YSTZ | 制造商:Analog Devices 功能描述:IC 12BIT ADC REF OSC SMD 2S1200 |
| AD2S1200YSTZSTZ | 制造商:Analog Devices 功能描述:ANAAD2S1200YSTZ |
| AD2S1200ZSTZ | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD2S1205 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit R/D Converter with Reference Oscillator |
| AD2S1205WSTZ | 功能描述:IC CONV R/D 12BIT W/OSC 44-LQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - ADCs/DAC - 專用型 系列:- 產品培訓模塊:Data Converter Basics 標準包裝:1 系列:- 類型:電機控制 分辨率（位）:12 b 采樣率（每秒）:1M 數據接口:串行，并聯 電壓電源:單電源 電源電壓:2.7 V ~ 3.6 V，4.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:100-TQFP 供應商設備封裝:100-TQFP（14x14） 包裝:剪切帶 (CT) 其它名稱:296-18373-1 |
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