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參數(shù)資料
| 型號： | AD1974 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | Codec |
| 英文描述： | 4 ADC with PLL, 192 kHz, 24-Bit Codec |
| 中文描述： | 4 ADC，具有鎖相環(huán)，192千赫，24位編解碼器 |
| 文件頁數(shù)： | 13/24頁 |
| 文件大?。?/td> | 307K |
| 代理商： | AD1974 |
AD1974
TDM MODES
The AD1974 serial ports also have several different TDM serial
data modes. The first and most commonly used configuration
is shown in Figure 6 where the ADC serial port outputs one
data stream consisting of four on-chip ADCs followed by four
unused slots. In this mode, ABCLK is set to 256 f
S
(8-channel
TDM mode).
The I/O pins of the serial ports are defined according to the
serial mode selected. For a detailed description of the function
of each pin in TDM and AUX Modes, see Table 12.
The AD1974 allows system configurations with more than four
ADC channels (see Figure 7 and Figure 8) that use 8 ADCs and
16 ADCs. In this mode, four AUX channel slots in the TDM out-
Rev. 0 | Page 13 of 24
put stream follow four on-chip ADC channel slots. It should be
noted that due to the high ABCLK frequency, this mode is
available only in the 48 kHz/44.1 kHz/32 kHz sample rate.
LEFT 1
SLOT 2
LEFT 2
SLOT 4
MSB
MSB–1
MSB–2
ADATA
ABCLK
ALRCLK
UNUSED UNUSED UNUSED UNUSED
ALRCLK
ABCLK
ADATA
256 BCLKs
32 BCLKs
0
Figure 6. ADC TDM (8-Channel I
2
S Mode.
Table 12. Pin Function Changes in TDM and AUX Modes
Pin Name
Stereo Mode
ASDATA1
ADC1 data output
ASDATA2
ADC2 data output
AUXDATA1
Not used (ground)
AUXDATA2
Not used (ground)
ALRCLK
ADC LRCLK input/output
ABCLK
ADC BCLK input/output
AUXLRCLK
Not used (ground)
AUXBCLK
Not used (ground)
TDM Mode
ADC TDM data output
ADC TDM data input
Not used (ground)
Not used (ground)
ADC TDM frame sync input/output
ADC TDM BCLK input/output
Not used (ground)
Not used (ground)
AUX Mode
ADCTDM data output
Not used (float)
AUXDATA in 1 (from external ADC1)
AUXDATA in 2 (from external ADC2)
ADCTDM frame sync input/output
ADCTDM BCLK input/output
AUXLRCLK input/output
AUXBCLK input/output
ABCLK
ALRCLK
AUXLRCLK
(AUX PORT)
ASDATA1
(TDM_OUT)
AUXBCLK
(AUX PORT)
AUXDATA1
(AUX1_IN)
AUXDATA2
(AUX2_IN)
ADCL1
ADCR1
ADCL2
ADCR2
AUXL1
AUXR1
AUXL2
AUXR2
FOUR-ON-CHIP DAC CHANNELS
32 BITS
LEFT
RIGHT
MSB
MSB
MSB
MSB
MSB
FOUR-AUX ADC CHANNELS
0
Figure 7. 8-Channel AUX ADC Mode
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| AD1974WBSTZ | 制造商:Analog Devices 功能描述: |
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