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  • 參數(shù)資料
    型號: AD1890JN
    廠商: ANALOG DEVICES INC
    元件分類: 消費(fèi)家電
    英文描述: SamplePort Stereo Asynchronous Sample Rate Converters
    中文描述: SPECIALTY CONSUMER CIRCUIT, PDIP28
    封裝: 0.600 INCH, PLASTIC, DIP-28
    文件頁數(shù): 15/20頁
    文件大?。?/td> 416K
    代理商: AD1890JN
    AD1890/AD1891
    REV. 0
    –15–
    Multiple ASRC Synchronization and Performance
    Degradation
    Multiple parallel AD1890/AD1891 ASRCs may be used in a
    single system. Multiple AD1890/AD1891s can be “synchro-
    nized” by simply sharing the same reset and MCLK lines, and
    ensuring that all the ASRCs leave the reset state on the same
    MCLK falling edge. No other provision is necessary since the
    different AD1890/AD1891s will process samples identically if
    they are presented with the same input and output clocks
    (neglecting the effect of excessive clock skew on the PCB, as
    well process variations between ASRCs which could cause dif-
    ferent devices to trigger at slightly different times on excessively
    slow rising or falling clock edges).
    It is also likely that several AD1890/AD1891s could end up in a
    serial cascade arrangement, either in a single systems design or
    as the result of two or more systems, each using a single AD1890/
    AD1891 in the signal path. T he audio signal quality will be
    degraded with each pass through an ASRC, though to a very
    minor degree. T he T HD+N performance will degrade by 3 dB
    with every doubling of the number of passes through an ASRC.
    For example, the AD1890 T HD+N specification of –106 dB (at
    1 kHz) will rise to –103 dB if the signal makes two passes
    through an ASRC. T he overall system T HD+N specification
    will rise to –100 dB with four passes, and so on.
    Clipping
    Under certain rare input conditions, it is possible for the
    AD1890/AD1891 ASRC to produce a clipped output sample.
    T his situation is best comprehended by employing the interpola-
    tion/decimation model. If two consecutive samples happened to
    have full-scale amplitudes (representing the peak of a full-scale
    sine wave, for example), the interpolated sample (or samples)
    between these two samples might have an amplitude greater
    than full scale. As this is not possible, the AD1890/AD1891 will
    compute a full-scale amplitude for the interpolated sample or
    samples (see Figure 12). Clipping can also arise due to the
    pre-echo and post-echo Gibbs phenomena of the FIR filter,
    when presented with a full-scale step input. T he result of this
    erroneous or clipped output sample may be measured as an
    extremely small decrease in headroom for transient signals.
    CORRECTLY INTERPOLATED SAMPLE
    CLIPPED INTERPOLATED SAMPLE
    FULL SCALE
    AMPLITUDE
    TIME
    Figure 12. Clipped Output Sample
    Varispeed
    It is also envisioned that the AD1890 will be used in varispeed
    applications. T he AD1890 and AD1891 SamplePorts are very
    useful for converting an input data stream with a variable
    sample rate (and therefore pitch characteristic) into an output
    data stream with a constant sample rate.
    Options for Sample Rate Conversion over a Wider Range
    T here are systems which require sample rate conversion over a
    range which is wider than the 1:2 or 2:1 range provided by a
    single AD1890 or AD1891, such as for “scrubbing” in digital
    audio editors. T here are at least two options in this situation.
    T he first is to use a programmable DSP chip to perform simple
    integer ratio interpolation or decimation, and then use the
    AD1890/AD1891 when this intermediate output sample fre-
    quency is within the 1:2 or 2:1 range of the final desired output
    sample frequency. T he second is to use multiple AD1890/
    AD1891 devices cascaded in series to achieve the required
    sample rate range.
    “ Almost Synchronous” Operation
    It is possible to apply input and output sample frequencies
    which are very close (within a few Hz) or in fact synchronous
    (L
    R
    _I and L
    R
    _O tied together). T here is no performance pen-
    alty when using the AD1890/AD1891 in “almost synchronous”
    applications. Indeed, there is a very slight performance benefit
    when the input and output sample clocks are synchronous since
    the alias distortion components which arise from the non-infinite
    stopband attenuation of the FIR filter will pile up exactly on top
    of the sinusoidal frequency components of the input signal, and
    will thus be masked.
    System Mute
    T he mute function applies to both right and left channels on the
    AD1890/AD1891. T he user can include a system specific out-
    put mute signal, while retaining the automatic mute feature of
    the AD1890/AD1891 by using the circuit shown in Figure 13.
    AD1890/AD1891
    EXTERNAL SYSTEM MUTE
    ACTIVE HI
    15
    16
    MUTE_O
    MUTE_I
    Figure 13. External Mute Circuit
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