- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375230 > AD1839AEB (Analog Devices, Inc.) 2 ADC, 6 DAC, 96 kHz, 24-Bit Sigma-Delta Codec PDF資料下載
參數(shù)資料
| 型號： | AD1839AEB |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | Codec |
| 英文描述： | 2 ADC, 6 DAC, 96 kHz, 24-Bit Sigma-Delta Codec |
| 中文描述： | 2的ADC，6 DAC的，96千赫，24位Σ-Δ編解碼器 |
| 文件頁數(shù)： | 15/24頁 |
| 文件大?。?/td> | 674K |
| 代理商： | AD1839AEB |
AD1839A
Rev. B | Page 15 of 24
LRCLK
BCLK
SDATA
LRCLK
BCLK
SDATA
LRCLK
BCLK
SDATA
LRCLK
BCLK
SDATA
LEFT CHANNEL
RIGHT CHANNEL
LEFT CHANNEL
RIGHT CHANNEL
LEFT CHANNEL
RIGHT CHANNEL
MSB
MSB
MSB
MSB
MSB
MSB
MSB
MSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LEFT-JUSTIFIED MODE—16 BITS TO 24 BITS PER CHANNEL
I
2
S MODE—16 BITS TO 24 BITS PER CHANNEL
RIGHT-JUSTIFIED MODE—SELECT NUMBER OF BITS PER CHANNEL
DSP MODE—16 BITS TO 24 BITS PER CHANNEL
1/
f
S
NOTES
1. DSP MODE DOES NOT IDENTIFY CHANNEL.
2. LRCLK
3. BCLK FREQUENCY IS NORMALLY 64× LRCLK BUT MAY BE OPERATED IN BURST MODE.
0
NORMALLY OPERATES AT
f
EXCEPT FOR DSP MODE, WHICH IS 2 ×
f
.
Figure 16. Stereo Serial Modes
ABCLK
ALRCLK
ASDATA
LEFT-JUSTIFIED
MODE
ASDATA
RIGHT-JUSTIFIED
MODE
LSB
ASDATA
I
2
S COMPATIBLE
MODE
MSB
MSB – 1
MSB
MSB
0
t
ABH
t
ABL
t
ALS
t
ABDD
Figure 17. ADC Serial Mode Timing
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD1843JS | CAP 3300PF 100V CERAMIC DISC Y5P |
| AD1843JST | Serial-Port 16-Bit SoundComm Codec |
| AD1846JP | Low Cost Parallel-Port 16-Bit SoundPort Stereo Codec |
| AD1849KP | Serial-Port 16-Bit SoundPort Stereo Codec |
| AD1851 | 16-Bit, 16×Fs PCM Audio DACs(16位,單片PCM音頻D/A轉(zhuǎn)換器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD1839AS | 制造商:Analog Devices 功能描述:AUD CODEC 2ADC / 6DAC 24BIT 52MQFP - Trays 制造商:Rochester Electronics LLC 功能描述:HIGH PERFORMANCE CODEC - Bulk |
| ad1839as-reel | 制造商:Analog Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel |
| AD183M | 制造商:Thomas & Betts 功能描述:TERMINAL BELT |
| AD-1840R | 制造商:SPC Multicomp 功能描述:ADAPTOR REG 18VDC 400MA |
| AD-1840R | 制造商:UNBRANDED 功能描述:ADAPTOR REG 18VDC 400MA |
發(fā)布緊急采購，3分鐘左右您將得到回復。