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參數(shù)資料
| 型號： | ACS30HMSR-03 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Radiation Hardened 8-Input NAND Gate |
| 中文描述： | 8-INPUT NAND GATE, UUC11 |
| 封裝： | 0.094 X 0.094 INCH, DIE-11 |
| 文件頁數(shù)： | 5/7頁 |
| 文件大小： | 120K |
| 代理商： | ACS30HMSR-03 |
ACS302-5T3
5/8
P(W)
0.00
0.02
0.04
0.06
0.08
0.10
0.12
0.14
0.16
0.18
0.20
0.00
0.02
0.04
0.06
0.08
0.10
0.12
0.14
0.16
0.18
0.20
I
(A)
T(RMS)
α
= 180°
180°
α
α
Fig. 5:
Maximum power dissipation versus RMS
on-state current (per switch).
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0
25
50
75
100
125
I
(A)
T(RMS)
T
(°C)
amb
α
= 180°
3 switches ON
1 switch ON
Fig. 6:
temperature.
RMS on-state current versus ambient
K=[Z
/ R
]
th(j-a)
th(j-a)
1.E-03
1.E-02
1.E-01
1.E+00
1.E-04
1.E-03
1.E-02
1.E-01
1.E+00
1.E+01
1.E+02
1.E+03
1 cell
3 cells
t (s)
Fig. 7:
Relative variation of thermal impedance
junction to ambient versus pulse duration .
I
[T ] / I
[T =25°C]
GT
GT
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-40 -30 -20 -10
0
10 20
30
40 50
60
70 80
90 100 110 120 130
T (°C)
Fig. 8:
Relative variation of gate trigger current
versus junction temperature (typical value).
I ,I [T ] / I ,I [T =25°C]
L H
j
L H
j
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
-40 -30 -20 -10
0
10 20
30
40 50
60
70 80
90 100 110 120 130
T (°C)
Fig. 9:
Relative variation of holding and latching
current
versus
junction
values).
temperature
(typical
I
(A)
TSM
0
1
2
3
4
5
6
7
8
1
10
100
1000
Number of cycles
One cycle
t=20ms
Tj initial=25°C
Non repetitive
Tamb=25°C
Repetitive
Fig. 10:
Surge peak on-state current versus
number of cycles.
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