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參數(shù)資料
| 型號： | A8423KL |
| 廠商： | Allegro MicroSystems, Inc. |
| 英文描述： | LIN Bus Transceiver with Integrated Voltage Regulator |
| 中文描述： | LIN總線收發(fā)器集成穩(wěn)壓器 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 368K |
| 代理商： | A8423KL |
5
Worcester, Massachusetts 01615-0036 (508) 853-5000
115 Northeast Cutoff, Box 15036
www.allegromicro.com
D
A
A8423
LIN Bus Transceiver with Integrated Voltage Regulator
Preliminary – Subject to Change
Without Notice February 9, 2004
or one of the two inactive modes, Standby or Sleep, are
entered (EN low). If no other wake-up signals are active,
EN low sets the A8423 into low-current Sleep mode. From
Sleep mode the A8423 can be put directly into Normal
mode by taking EN high. Alternatively, it can be taken into
Standby mode by pulling the WAKE input to ground or by a
dominant state on the LIN Bus.
In Sleep mode, the supply current is at its minimum level,
and the LIN and RX pins are high impedance. In this mode,
the linear regulator is still active. When the power is
fi
rst
applied, the A8423 enters Sleep mode directly.
From Sleep mode, the A8423 may be taken through the
Standby mode, in which the RX output goes low to wake
up the protocol control device attached to the TX, RX, and
EN pins. Once the controller is active, it may then bring the
A8423 into Normal mode by taking EN high. If there is no
need to wake the controller prior to enabling the A8423, then
simply asserting EN high moves the A8423 directly from
Sleep mode to Normal mode.
The EN input has an internal pull-down resistor to ensure a
known safe state when the protocol controller is powered off.
The WAKE signal is a high-voltage input, which is designed
to allow a node on a sleeping bus to be awaken by a local
event. Sleep mode may be entered when WAKE is connected
directly to the battery or other similar voltage, such as VSUP.
To disable Sleep mode and allow the A8423 to enter Standby
mode, the WAKE input should be switched to ground.
The A8423 incorporates two protection functions. If the die
temperature becomes excessive, a thermal shutdown feature
(TSD) disables the LIN output dominant-state drive. Once
the temperature falls below the hysteresis level, the LIN out-
put resumes the state de
fi
ned by the TX input. During TSD,
the output on VREG is maintained.
If the supply voltage drops below the UVLO threshold, all
outputs are disabled. When the supply voltage rises above
the UVLO threshold, the A8423 is reset into the Sleep mode.
From that state, it follows the logic shown in
fi
gure 1. That is,
if Active is true (T), the A8423 immediately goes to Standby
mode. If EN is high, it goes directly to the normal mode.
Linear Regulator
.
The A8423 provides a linear regulator
output with speci
fi
ed line and load regulation up to 30 mA
at 5 V. The regulator output is current-limited, at typically
100 mA. Care must be taken, however, when operating
above 30 mA, due to power dissipation. This is especially
important under fault conditions, such as load dump. This
output is active all modes, allowing a low-power microcon-
troller to continuously monitor sensor signals.
Power Dissipation.
Most power will normally be dissi-
pated in the linear regulator. Because the output of the regu-
lator is
fi
xed at 5 V, but the input supply can vary between
7 V and 18 V, care must be taken when setting the maximum
current. This is particularly important if the ability of the
A8423 to withstand a 40 V load dump is to be used.
The
fi
gures in the charts on the following page show the
allowable power dissipation and estimated maximum
current for various ambient temperatures and supply volt-
ages. The data were taken using a standard FR4 board with
minimal copper (R
θ
JA
= 140oC/W), and using a "High K"
dielectric board with copper ground plane and thermal vias
(R
θ
JA
= 80oC/W).
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