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| 型號： | A81L801UG-70I |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
| 中文描述： | 堆疊式多芯片封裝（MCP）1的MX 8位/ 16位為512k ×引導(dǎo)扇區(qū)閃存和128K × 8 SRAM的低電壓的CMOS |
| 文件頁數(shù)： | 38/47頁 |
| 文件大?。?/td> | 705K |
| 代理商： | A81L801UG-70I |
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A81L801
PRELIMINARY (March, 2005, Version 0.0)
37
AMIC Technology, Corp.
Timing Waveforms for Alternate
CE_F
Controlled Write Operation
Addresses
WE
OE
CE_F
Data
555 for program
2AA for erase
PA
D
OUT
~
~
I/O
7
~
~
~
Data Polling
Note :
1. PA = Program Address, PD = Program Data, SA = Sector Address, I/O
7
= Complement of Data Input, D
OUT
= Array Data.
2. Figure indicates the last two bus cycles of the command sequence.
PD for program
30 for sector erase
10 for chip erase
~
t
BUSY
t
WHWH1 or 2
t
AH
t
AS
t
WC
t
WH
t
CP
t
WS
t
CPH
PA for program
SA for sector erase
555 for chip erase
A0 for program
55 for erase
t
RH
t
DS
t
DH
~
~
RESET
RY/BY
Erase and Programming Performance
Parameter
Typ. (Note 1)
1.0
35
35
12
11
Max. (Note 2)
8
Unit
sec
sec
μ
s
μ
s
sec
Comments
Sector Erase Time
Chip Erase Time
Byte Programming Time
Word Programming Time
Excludes 00h programming
prior to erasure
300
500
33
Byte Mode
Chip Programming Time
(Note 3)
Word Mode
7.2
21.6
sec
Excludes system-level
overhead (Note 5)
Notes:
1. Typical program and erase times assume the following conditions: 25
°
C, 3.0V VCC_F, 10,000 cycles. Additionally, programming
typically assumes checkerboard pattern.
2. Under worst case conditions of 90
°
C, VCC_F = 2.7V, 100,000 cycles.
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes
program faster than the maximum byte program time listed. If the maximum byte program time given is exceeded, only then does
the device set I/O
5
= 1. See the section on I/O
5
for further information.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the four-bus-cycle command sequence for programming. See Table 5 for
further information on command definitions.
6. The device has a guaranteed minimum erase and program cycle endurance of 10,000 cycles.
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參數(shù)描述 |
|---|---|
| A81L801UG-70IF | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:Stacked Multi-chip Package (MCP) 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM |
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