參數(shù)資料
型號: A43L4616
廠商: AMIC Technology Corporation
英文描述: 4M X 16 Bit X 4 Banks Synchronous DRAM
中文描述: 4米× 16位× 4個(gè)銀行同步DRAM
文件頁數(shù): 8/41頁
文件大?。?/td> 1063K
代理商: A43L4616
A43L4616
(September, 2004, Version 0.0)
7
AMIC Technology, Corp.
Operating AC Parameter
(AC operating conditions unless otherwise noted)
Version
Symbol
Parameter
CAS Latency
-7
Unit
Note
t
RRD(min)
Row active to row active delay
15
ns
1
t
RCD(min)
RAS to
CAS
delay
15
ns
1
t
RP(min)
Row precharge time
20
ns
1
t
RAS(min)
40
ns
1
t
RAS(max)
Row active time
100
μ
s
t
RC(min)
Row cycle time
60
ns
1
t
CDL(min)
Last data in new col. Address delay
7
ns
2
t
RDL(min)
Last data in row precharge
14
ns
2
t
BDL(min)
Last data in to burst stop
7
ns
2
t
CCD(min)
Col. Address to col. Address delay
2,3
7
ns
Note:
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and
then rounding off to the next higher integer.
2. Minimum delay is required to complete write.
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