參數(shù)資料
型號: A42MX16-3PL100ES
廠商: Electronic Theatre Controls, Inc.
英文描述: 40MX and 42MX FPGA Families
中文描述: 40MX和42MX FPGA系列
文件頁數(shù): 49/120頁
文件大?。?/td> 854K
代理商: A42MX16-3PL100ES
34
4958B–AUTO–11/10
Atmel ATA6285/ATA6286 [Preliminary]
The start-up sequence for the clock includes both the time-out delay and the start-up time when
the device starts up from reset. When starting up from Power-down mode, VCC is assumed to
be at a sufficient level and only the start-up time is included (see Table 3-7).
3.7.4
Calibrated Internal Fast RC-Oscillator (FRC)
The calibrated internal FRC-Oscillator has two selectable fundamental speed frequencies
(1MHz/4MHz), which are determined by the FRCFS Fuse. The device is shipped with the
more details. During reset, hardware loads the calibration byte into the FRCCAL Register and
thereby automatically calibrates the FRC-Oscillator. Over a supply range of 1.9V to 3.6V and for
a temperature range of –40°C to +85°C, the calibration gives a frequency of 1MHz / 4MHz±10%
(ensured by final test). The oscillator can be calibrated for any frequency in the range of 0.9MHz
to 1.1MHz/3.6MHz to 4.4MHz within ±1% accuracy for a fixed supply voltage and temperature,
by changing the FRCCAL register (typical value, not measured in final test).
3.7.4.1
Fast Frequency RC – Oscillator Calibration Register – FRCCAL
Bit 7, 6 - Res: Reserved Bits
These bits are reserved and will be always read as zero.
Bits 5..0 - FCAL: Fast frequency RC-oscillator CALibration Value
The Oscillator Calibration Register is used to trim the Calibrated Internal FRC Oscillator to
remove process variations from the Oscillator frequency. The factory-calibrated value is auto-
matically written to this register during chip reset, giving an oscillator frequency of 1MHz/ 4MHz.
The application software can write this register to change the oscillator frequency. The oscillator
can be calibrated to any frequency in the range of 0.9MHz to 1.1MHz/3.6MHz to 4.4MHz within
1% accuracy for a fixed supply voltage and temperature. Calibration outside that range is not
guaranteed.
Note that this oscillator is used to time EEPROM and Flash write accesses, and these write
times will be affected accordingly.
Table 3-7.
Power-down and Reset Delays
Power Conditions
Start-up Time from Sensor Noise
Reduction and Power-down
Additional Delay from Reset
(POR), V
CC = 3.0V
SUT1..0
Reserved
00
Fast rising power
6CLK
14CLK(1) + 5.7ms (10ms)
01
Slowly rising power
6CLK
14CLK(1) + 91ms (140ms)
10 (default)
Reserved
11
Note:
1. CLK = Clock from prescaler output
Bit
76543210
-
FCAL5
FCAL4
FCAL3
FCAL2
FCAL1
FCAL0
FRCCAL
Read/Write
R
R/W
Initial Value
00000000
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