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參數(shù)資料
| 型號： | A42MX16-2BG100 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 40MX and 42MX FPGA Families |
| 中文描述： | 40MX和42MX FPGA系列 |
| 文件頁數(shù)： | 105/120頁 |
| 文件大?。?/td> | 854K |
| 代理商： | A42MX16-2BG100 |
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85
4958B–AUTO–11/10
Atmel ATA6285/ATA6286 [Preliminary]
The general I/O port function is overridden by the Timer2 modulator stage in case the selected
timer mode are needed the output pins. However, the pin direction (input or output) is still con-
trolled by the Data Direction Register (DDR) for the port pin. The Data Direction Register bits for
the T2O1 and T2O2 pins (DDD5, DDD6) must be set as output before the value is visible on the
pin. When the modulator has select the SPI mode of the SSI, PD7 pin is configured as an input
regardless of the setting of DDD7 bit. The port override function is generally independent of the
modulator mode, but there are some exceptions. Refer to Table 3-41 on page 94 for details.
If the “ATA6289” is combined with ATA5756/ATA5757 as stacked die the pins PD5/T2O1 and
PD6/T2O2 are internally bonded with the “ASK” - and “FSK” - pins of Atmel
ATA5756/ATA5757
respectively, see Figure 2-2 on page 4. So you can use the SSI of Timer2 modulator stage to
modulate the ATA5756/ATA5757 (ASK - or FSK - modulation).
3.13.5.4
Modulator Toggle Flip-Flop (T2)
The toggle flip-flop (T2) consists of a flip-flop with a preset input signal (T2TOP), an input clock
(CLK
T2) and an output signal (M2). The T2TOP bit at T2MRB register allows the programmer to
initialize the toggle output flip-flop signal (M2), only if the Timer2 is not running (T2E = '0'). The
output signal (M2) was negated with every rising edge of the input clock (CLK
T2). The Figure
3-32 shows Toggle Flip-Flop (T2).
Figure 3-32. Toggle Flip-Flop (T2)
Figure 3-33. Example of Toggle Flip-Flop (T2)
CLKT2
M2
T2TOP
T2
CLKT2
M2
T2E
T2TOP
write access
’1’
’0’
’1’
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A42MX24-2BG100 | Proximity Sensor; Sensor Input Type:Inductive; Sensing Range Max:15mm; Sensor Output Type:NPN Transistor; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Sensing Face Diameter:18mm; Sensor Housing:Barrel |
| A42MX36-2BG100 | 40MX and 42MX FPGA Families |
| A42MX02-2BG100A | Proximity Sensor; Sensor Input Type:Inductive; Sensing Range Max:15mm; Sensor Output Type:NPN Transistor; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Sensing Face Diameter:18mm; Sensor Housing:Barrel |
| A42MX04-2BG100A | 40MX and 42MX FPGA Families |
| A42MX09-2BG100A | Inductive Proximity Sensor; Sensor Input Type:Inductive; Sensing Range Max:20mm; Sensor Output:AC/DC; Switch Terminals:Cable; Load Current Max:400mA; Sensing Face Diameter:30mm; Sensor Connection:2 m Cable; Sensor Housing:Barrel RoHS Compliant: Yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A42MX16-2BG100A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2BG100B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2BG100ES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2BG100I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
| A42MX16-2BG100M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families |
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