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參數(shù)資料
| 型號(hào)： | 9UMS9633BKLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 166.67 MHz, OTHER CLOCK GENERATOR, PQCC48 |
| 封裝： | 6 X 6 MM, 0.40 MM PITCH, ROHS COMPLIANT, PLASTIC, MLF-48 |
| 文件頁數(shù)： | 19/22頁 |
| 文件大?。?/td> | 208K |
| 代理商： | 9UMS9633BKLFT |
IDTTM/ICSTM Ultra Mobile PC/Mobile Internet Device
1423—01/20/09
ICS9UMS9633B
ULTRA MOBILE PC/MOBILE INTERNET DEVICE
6
Advance Information
MLF Pin Description (continued)
PIN #
PIN NAME
TYPE
DESCRIPTION
25
GNDSRC
PWR Ground pin for the SRC outputs
26
SRCC0_LPR
OUT
Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm
series resistor. No 50ohm resistor to GND needed.
27
SRCT0_LPR
OUT
True clock of differential 0.8V push-pull SRC output with integrated 33ohm series
resistor. No 50ohm resistor to GND needed.
28
*CR#1
IN
Clock request for SRC1, 0 = enable, 1 = disable
29
VDDCORE_3.3
PWR 3.3V power for the PLL core
30
VDDIO_1.5
PWR Power supply for low power differential outputs, nominal 1.5V.
31
SRCC1_LPR
OUT
Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm
series resistor. No 50ohm resistor to GND needed.
32
SRCT1_LPR
OUT
True clock of differential 0.8V push-pull SRC output with integrated 33ohm series
resistor. No 50ohm resistor to GND needed.
33
GNDSRC
PWR Ground pin for the SRC outputs
34
SRCC2_LPR
OUT
Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm
series resistor. No 50ohm resistor to GND needed.
35
SRCT2_LPR
OUT
True clock of differential 0.8V push-pull SRC output with integrated 33ohm series
resistor. No 50ohm resistor to GND needed.
36
*CR#2
IN
Clock request for SRC2, 0 = enable, 1 = disable
37
FSB_L
IN
Low threshold input for CPU frequency selection. Refer to input electrical
characteristics for Vil_FS and Vih_FS values.
38
CPUC2_LPR
OUT
Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated
33ohm series resistor. No 50 ohm resistor to GND needed.
39
CPUT2_LPR
OUT
True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm
series resistor. No 50 ohm resistor to GND needed.
40
GNDCPU
PWR Ground pin for the CPU outputs
41
VDDIO_1.5
PWR Power supply for low power differential outputs, nominal 1.5V.
42
VDDCORE_3.3
PWR 3.3V power for the PLL core
43
CPUC1_LPR
OUT
Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated
33ohm series resistor. No 50 ohm resistor to GND needed.
44
CPUT1_LPR
OUT
True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm
series resistor. No 50 ohm resistor to GND needed.
45
GNDCPU
PWR Ground pin for the CPU outputs
46
VDDIO_1.5
PWR Power supply for low power differential outputs, nominal 1.5V.
47
CPUC0_LPR
OUT
Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated
33ohm series resistor. No 50 ohm resistor to GND needed.
48
CPUT0_LPR
OUT
True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm
series resistor. No 50 ohm resistor to GND needed.
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