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MC9S12DJ64 Device User Guide — V01.17
25
1.5 Device Memory Map
Table 1-1
and
Figure 1-2
show the device memory map of the MC9S12DJ64 after reset. The 1K
EEPROM is mapped twice in a 2K address space. Note that after reset the bottom 1k of the EEPROM
($0000 - $03FF) are hidden by the register space, and the 1K $0400 - $07FF is hidden by the RAM.
Table 1-1 Device Memory Map
Address
Module
Size
(Bytes)
$0000 - $000F
$0010 - $0014
$0015 - $0016
$0017 - $0019
$001A - $001B
$001C - $001D
$001E
$001F
$0020 - $0027
$0028 - $002F
$0030 - $0031
$0032 - $0033
$0034 - $003F
$0040 - $007F
$0080 - $009F
$00A0 - $00C7
$00C8 - $00CF
$00D0 - $00D7
$00D8 - $00DF
$00E0 - $00E7
$00E8 - $00EF
$00F0 - $00FF
$0100- $010F
$0110 - $011B
$011C - $011F
$0120 - $013F
$0140 - $017F
$0180 - $023F
$0240 - $027F
$0280 - $03FF
HCS12 Multiplexed External Bus Interface
HCS12 Module Mapping Control
HCS12 Interrupt
Reserved
Device ID register (PARTID)
HCS12 Module Mapping Control
HCS12 Multiplexed External Bus Interface
HCS12 Interrupt
Reserved
HCS12 Breakpoint Module
HCS12 Module Mapping Control
HCS12 Multiplexed External Bus Interface
Clock and Reset Generator (PLL, RTI, COP)
Enhanced Capture Timer 16-bit 8 channels
Analog to Digital Converter 10-bit 8 channels (ATD0)
Pulse Width Modulator 8-bit 8 channels (PWM)
Serial Communications Interface 0 (SCI0)
Serial Communications Interface 0 (SCI1)
Serial Peripheral Interface (SPI0)
Inter IC Bus
Byte Data Link Controller (BDLC)
Reserved
Flash Control Register
EEPROM Control Register
Reserved
Analog to Digital Converter 10-bit 8 channels (ATD1)
Motorola Scalable Can (CAN0)
Reserved
Port Integration Module (PIM)
Reserved
EEPROM array 1k Array mapped twice in the
address space
RAM array
Fixed Flash EEPROM array
incl. 0.5K, 1K, 2K or 4K Protected Sector at start
Flash EEPROM Page Window
16
5
2
3
2
2
1
1
8
8
2
2
12
64
32
40
8
8
8
8
8
16
16
12
4
32
64
192
64
384
$0000 - $07FF
2048
$0000 - $0FFF
4096
$4000 - $7FFF
16384
$8000 - $BFFF
16384