參數(shù)資料
型號(hào)： 9FG1201HGLF-T
廠(chǎng)商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： 時(shí)鐘產(chǎn)生/分配
英文描述： 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝： 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-56
文件頁(yè)數(shù)： 1/23頁(yè)
文件大?。?/td> 269K
代理商： 9FG1201HGLF-T
ICS9FG1201H
IDTTM/ICSTM
Frequency Gearing Clock for CPU, PCIe Gen1, Gen2, & FBD
1371E — 01/21/09
Frequency Gearing Clock for CPU, PCIe Gen1, Gen2, &
FBD
DATASHEET
1
Description
The ICS9FG1201H follows the Intel DB1200G Rev 1.0 Differential
Buffer Specification. This buffer provides 12 output clocks for CPU
Host Bus, PCI-Express, or Fully Buffered DIMM applications. The
outputs are configured with two groups. Both groups (DIF 9:0) and
(DIF 11:10) can be equal to or have a gear ratio to the input clock. A
differential CPU clock from a CK410B or CK410B+ main clock
generator, such as the ICS932S421, drives the ICS9FG1201. The
ICS9FG1201H can provide outputs up to 400MHz
Key Specifications
DIF output cycle-to-cycle jitter < 50ps
DIF output-to-output skew < 50ps within a group
DIF output-to-output skew < 100ps across all outputs
56-pin SSOP/TSSOP package
RoHS compliant packaging
Features/Benefits
Drives 2 channels of 4 FBDIMMs (total of 8 FBDIMMs)
Power up default is all outputs in 1:1 mode
DIF_(9:0) can be “gear-shifted” from the input CPU Host
Clock
DIF_(11:10) can be “gear-shifted” from the input CPU Host
Clock
Spread spectrum compatible
Supports output clock frequencies up to 400 MHz
8 Selectable SMBus addresses
SMBus address determines PLL or Bypass mode
Funtional Block Diagram
STOP
LOGIC
CLK_IN
CLK_IN#
DIF(9:0)
CONTROL
LOGIC
HIGH_BW#
SMB_A2_PLLBYP#
SMBDAT
SMBCLK
VTT_PWRGD#/PD
SPREAD
COMPATIBLE
PLL
10
IREF
OE(9:0)#
10
SMB_A0
SMB_A1
FS_A_410
STOP
LOGIC
DIF(11:10)
2
OE#
GEAR
SHIFT
LOGIC
SPREAD
COMPATIBLE
PLL
GEAR
SHIFT
LOGIC
相關(guān)PDF資料
PDF描述
9FG1201HGLF 400 MHz, OTHER CLOCK GENERATOR, PDSO56
9FG1201HGLFT 400 MHz, OTHER CLOCK GENERATOR, PDSO56
9FG1901HKLFT 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC72
9FG1901YKLF-T 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC72
9FG1901YK-T 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC72
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
9FG1900AK-1LF 制造商:Integrated Device Technology Inc 功能描述:IDT 9FG1900AK-1LF LOGIC AND TIMING MISC - Trays 制造商:Integrated Device Technology Inc 功能描述:IDT 9FG1900AK-1LF Logic and Timing Misc
9FG1900BK-1LF 功能描述:時(shí)鐘緩沖器 PCIE BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel
9FG1900BK-1LFT 功能描述:時(shí)鐘緩沖器 PCIE BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel
9FG1901CKLF 制造商:Integrated Device Technology Inc 功能描述:PLL Frequency Generator Dual 72-Pin VFQFPN EP Tray 制造商:Integrated Device Technology Inc 功能描述:PCIE BUFFER
9FG1901CKLFT 制造商:Integrated Device Technology Inc 功能描述:PLL Frequency Generator Dual 72-Pin VFQFPN EP T/R 制造商:Integrated Device Technology Inc 功能描述:PLL FREQ GENERATOR DUAL 72PIN VFQFPN - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:PCIE BUFFER
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*