參數(shù)資料
型號: 9EX21831AKLF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72
封裝: ROHS COMPLIANT, PLASTIC, MLF-72
文件頁數(shù): 6/17頁
文件大?。?/td> 179K
代理商: 9EX21831AKLF
IDT
Eighteen Output Differential Buffer w/2 input mux for PCIe Gen3
1678A—07/13/10
9EX21831
Eighteen Output Differential Buffer w/2 input mux for PCIe Gen3
14
SMBusTable: Output Enable Readback Register
Pin #
Name
Control Function
Type0
1
Default
Bit 7
0
Bit 6
0
Bit 5
1
Bit 4
SEL_A_B# Input
Pin Readback
R
Input B
Input A
X
Bit 3
OE15_17# Input
Pin Readback
R
Pin Low
Pin Hi
X
Bit 2
OE14# Input
Pin Readback
R
Pin Low
Pin Hi
X
Bit 1
OE13# Input
Pin Readback
R
Pin Low
Pin Hi
X
Bit 0
OE12# Input
Pin Readback
R
Pin Low
Pin Hi
X
Note: For an output to be enabled, BOTH the Output Enable Bit and the OE# pin must be enabled.
This means that the Output Enable Bit must be '1' and the corresponding OE# pin must be '0'.
SMBusTable: Vendor & Revision ID Register
Pin #
Name
Control Function
Type0
1
Default
Bit 7
RID3
R
-
0
Bit 6
RID2
R
-
0
Bit 5
RID1
R
-
0
Bit 4
RID0
R
-
1
Bit 3
VID3
R
-
0
Bit 2
VID2
R
-
0
Bit 1
VID1
R
-
0
Bit 0
VID0
R
-
1
SMBusTable: DEVICE ID
Pin #
Name
Control Function
Type0
1
Default
Bit 7
R0
Bit 6
R0
Bit 5
R0
Bit 4
R1
Bit 3
R1
Bit 2
R0
Bit 1
R0
Bit 0
R0
SMBusTable: Byte Count Register
Pin #
Name
Control Function
Type0
1
Default
Bit 7
BC7
RW
--
0
Bit 6
BC6
RW
--
0
Bit 5
BC5
RW
--
0
Bit 4
BC4
RW
--
0
Bit 3
BC3
RW
--
0
Bit 2
BC2
RW
--
1
Bit 1
BC1
RW
--
1
Bit 0
BC0
RW
-
1
Device ID 5
Device ID is 18 hex
RESERVED
Device ID 2
REVISION ID
-
Device ID 6
Device ID 7 (MSB)
VENDOR ID
-
68
-
8
-
22
18
Device ID 1
Writing to this register
configures how many
bytes will be read back.
-
Byte 4
-
15
Byte 5
Byte 6
Byte 7
-
Device ID 3
Device ID 4
Device ID 0
RESERVED
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