參數(shù)資料
型號(hào): 9DB801BFLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
封裝: ROHS COMPLIANT, MO-153, SSOP-48
文件頁(yè)數(shù): 4/20頁(yè)
文件大?。?/td> 277K
代理商: 9DB801BFLFT
12
Integrated
Circuit
Systems, Inc.
ICS9DB801
1015B—09/07/06
SMBus Table: Output Control Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
RW
X
Bit 6
RW
X
Bit 5
RW
X
Bit 4
RW
X
Bit 3
RW
X
Bit 2
RW
X
Bit 1
RW
X
Bit 0
RW
X
SMBus Table: Vendor & Revision ID Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
RID3
R
-
X
Bit 6
RID2
R
-
X
Bit 5
RID1
R
-
X
Bit 4
RID0
R
-
X
Bit 3
VID3
R
-
0
Bit 2
VID2
R
-
0
Bit 1
VID1
R
-
0
Bit 0
VID0
R
-
1
SMBus Table: DEVICE ID
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
R1
Bit 6
R0
Bit 5
R0
Bit 4
R0
Bit 3
R0
Bit 2
R0
Bit 1
R0
Bit 0
R1
SMBus Table: Byte Count Register
Pin #
Name
Control
Function
Type
0
1
PWD
Bit 7
BC7
RW
-
0
Bit 6
BC6
RW
-
0
Bit 5
BC5
RW
-
0
Bit 4
BC4
RW
-
0
Bit 3
BC3
RW
-
0
Bit 2
BC2
RW
-
1
Bit 1
BC1
RW
-
1
Bit 0
BC0
RW
-
1
Reserved
Byte 3
Reserved
Byte 4
-
REVISION ID
-
VENDOR ID
-
Byte 5
-
Byte 6
-
Writing to this register
configures how many
bytes will be read back.
-
Device ID 7 (MSB)
Reserved
Device ID 4
Reserved
Device ID 6
Reserved
Device ID 3
Reserved
Device ID 0
Reserved
Device ID 2
Reserved
Device ID 1
Reserved
Device ID 5
相關(guān)PDF資料
PDF描述
9DB801BGLF 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
9DB801CGLF 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
9DB801CFLF 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
9DB801BFLF 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
9DB801BGLFT 9DB SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
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